OV7670_VGA\CMOS_Capture.v
..........\db\DE2_D5M.db_info
..........\..\DE2_D5M.qns
..........\..\DE2_D5M.sas
..........\..\DE2_D5M.sld_design_entry.sci
..........\DE2_D5M.asm.rpt
..........\DE2_D5M.cdf
..........\DE2_D5M.done
..........\DE2_D5M.dpf
..........\DE2_D5M.fit.rpt
..........\DE2_D5M.fit.smsg
..........\DE2_D5M.fit.summary
..........\DE2_D5M.flow.rpt
..........\DE2_D5M.map.rpt
..........\DE2_D5M.map.summary
..........\DE2_D5M.pin
..........\DE2_D5M.pof
..........\DE2_D5M.qpf
..........\DE2_D5M.qsf
..........\DE2_D5M.qws
..........\DE2_D5M.sof
..........\DE2_D5M.tan.rpt
..........\DE2_D5M.tan.summary
..........\DE2_D5M.v
..........\DE2_D5M.v.bak
..........\DE2_D5M_assignment_defaults.qdf
..........\I2C_AV_Config.v
..........\I2C_AV_Config.v.bak
..........\I2C_Controller.v
..........\I2C_OV7670_Config.v
..........\incremental_db\compiled_partitions\DE2_D5M.db_info
..........\..............\...................\DE2_D5M.root_partition.cmp.atm
..........\..............\...................\DE2_D5M.root_partition.cmp.dfp
..........\..............\...................\DE2_D5M.root_partition.cmp.hdbx
..........\..............\...................\DE2_D5M.root_partition.cmp.kpt
..........\..............\...................\DE2_D5M.root_partition.cmp.rcf
..........\..............\...................\DE2_D5M.root_partition.map.atm
..........\..............\...................\DE2_D5M.root_partition.map.dpi
..........\..............\...................\DE2_D5M.root_partition.map.hdbx
..........\..............\...................\DE2_D5M.root_partition.map.kpt
..........\..............\...................\DE2_D5M.root_partition.merge_hb.atm
..........\..............\README
..........\MY_FPGA_BOARD.tcl
..........\Sdram_Control_4Port\command.v
..........\...................\control_interface.v
..........\...................\Sdram_Control_4Port.v
..........\...................\Sdram_Control_4Port.v.bak
..........\...................\Sdram_Params.h
..........\...................\Sdram_PLL.ppf
..........\...................\Sdram_PLL.qip
..........\...................\Sdram_PLL.v
..........\...................\Sdram_PLL_wave0.jpg
..........\...................\Sdram_PLL_waveforms.html
..........\...................\Sdram_RD_FIFO.qip
..........\...................\Sdram_RD_FIFO.v
..........\...................\Sdram_WR_FIFO.qip
..........\...................\Sdram_WR_FIFO.v
..........\...................\sdr_data_path.v
..........\serv_req_info.txt
..........\V\CCD_Capture.v
..........\.\CCD_Capture.v.bak
..........\.\I2C_CCD_Config.v
..........\.\I2C_CCD_Config.v.bak
..........\.\I2C_Controller.v
..........\.\Line_Buffer.bsf
..........\.\Line_Buffer.v
..........\.\RAW2RGB.v
..........\.\RAW2RGB.v.bak
..........\.\Reset_Delay.v
..........\.\Reset_Delay.v.bak
..........\.\sdram_pll.bsf
..........\.\sdram_pll.ppf
..........\.\sdram_pll.v
..........\.\sdram_pll_wave0.jpg
..........\.\sdram_pll_waveforms.html
..........\.\SEG7_LUT.v
..........\.\SEG7_LUT_8.v
..........\.\VGA_Controller.v
..........\.\VGA_Controller.v.bak
..........\.\VGA_Param.h
..........\incremental_db\compiled_partitions
..........\db
..........\incremental_db
..........\Sdram_Control_4Port
..........\V
OV7670_VGA