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Extracted 4 times realize CIC decimation filter module Verilog realize that in the data collected before the first filter
Update : 2008-10-13 Size : 819byte Publisher : 楚鹤

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Total code 381, and its operating environment are as follows: IE 5 or later Mozilla Firefox 1.5.0.3 or later server using IIS5.1 or later database using MS Access 2000 and above
Update : 2008-10-13 Size : 1.21mb Publisher : zhaohao

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Delphi procedures for embedding analytic formula, you can use the object.
Update : 2008-10-13 Size : 44kb Publisher : 齐飞

On Xilinx_ISE circumstances, bound by the design and timing analysis application guide, very practical
Update : 2008-10-13 Size : 952.95kb Publisher : joan

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Section of local identity card machine calibration source, a program can control only a network card in the machine implementation, the absolute originality
Update : 2008-10-13 Size : 39.49kb Publisher : donght

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ucosii the preparation of the operating system for embedded operating system.
Update : 2008-10-13 Size : 7mb Publisher : 张艺展

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Jiamijiemi.rar used in conjunction with the serial number generator source, the absolute originality
Update : 2008-10-13 Size : 29.31kb Publisher : donght

China (including China Taiwan region) corresponding to each network segment University
Update : 2008-10-13 Size : 24.62kb Publisher : 冉俊

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Image sharpening, using different methods Baorui images of the same treatment to compare the effect of
Update : 2008-10-13 Size : 3.82kb Publisher : nana

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China
Update : 2008-10-13 Size : 790.34kb Publisher : 范佑

Xilinx-ISE-aided design tools for use in Chinese, including the IP core generator, layout router, FPGA Editor bottom, timing analyzer, integrated logic analysis tools, power analysis tools
Update : 2008-10-13 Size : 1.52mb Publisher : joan

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Go to the target server (FTP) to check and download the target file, is a practical source code segment, can be modified according to your own needs, original!
Update : 2008-10-13 Size : 1.1kb Publisher : donght
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