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aes encryption algorithm realize the VHDL code in FPGA chips upward tried
Update : 2025-01-23 Size : 6kb Publisher : stym_001

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This procedure can be the end of the document in the PE to add a new section, which has been in the encryption process to start running when asked to enter a password.
Update : 2025-01-23 Size : 20kb Publisher : 张华

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3DES the delphi source, their des algorithm on the basis of the 3DES algorithm, tested and absolutely available.
Update : 2025-01-23 Size : 4kb Publisher : 谢佳友

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Playfair will be expressly in the two-letter combinations treated as a unit, and these modules is converted to the two-letter combinations.
Update : 2025-01-23 Size : 4kb Publisher : skittles

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Can use this to file CRC checksum, to ensure the uniqueness of
Update : 2025-01-23 Size : 1.8mb Publisher : 陈毛毛

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C realize the use of 300 commonly used encryption algorithm, such as rsa, des
Update : 2025-01-23 Size : 508kb Publisher : Leo.Lee

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Parallel Implementation of CRC checksum, Verilog source code .8-bit data input, to achieve fast, applicable with all types of devices.
Update : 2025-01-23 Size : 77kb Publisher : 徐亮

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DES/DES3 with operators of CBC and OFB
Update : 2025-01-23 Size : 7kb Publisher : xiaodingdang

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This is a md5 encryption algorithm, is my under-line, in this and the U.S. share
Update : 2025-01-23 Size : 1kb Publisher : 张恒

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For 10M, 100M, 1000M Ethernet parallel CRC algorithm, the CRC algorithm is different from the ordinary. Verilog Description
Update : 2025-01-23 Size : 1kb Publisher : winwalk

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Dongle detection tool, can remove the dog. For use VFP particularly appropriate to do the procedure.
Update : 2025-01-23 Size : 5kb Publisher : guobaolin

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Using java to write the RSA encryption and decryption procedures, support for digital signature verification and sub-encryption, has a friendly graphical interface.
Update : 2025-01-23 Size : 5kb Publisher : 羊毛
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