[Post-TeleCom sofeware systems] SCM

Description: SCM space channel Model for 3GPP
Platform: | Size: 1024 | Author: achs | Hits:

[Post-TeleCom sofeware systems] Tw2835code

Description: tecwell 2835 motion function to initialize and set the value of motion ebable input 4channel
Platform: | Size: 123904 | Author: 黃志平 | Hits:

[Post-TeleCom sofeware systems] UAR_sound_control

Description: La estupida evaluacion heuristica
Platform: | Size: 582656 | Author: juan | Hits:

[Post-TeleCom sofeware systems] sms

Description: SMS transfer systems
Platform: | Size: 1024 | Author: ZJC | Hits:

[Post-TeleCom sofeware systems] YD-T_1363.3-2005

Description: YD-T_1363.3-2005_ Communications Authority (station) power supply, air-conditioning and environmental monitoring and management systems focus on Part 3: intelligent front-end agreement
Platform: | Size: 4998144 | Author: anono | Hits:

[Post-TeleCom sofeware systems] YD-T_1363.4-2005

Description: YD-T_1363.4-2005_ Communications Authority (station) power supply, air-conditioning and environmental management system for centralized monitoring Part 4: Test Methods
Platform: | Size: 1579008 | Author: anono | Hits:

[Post-TeleCom sofeware systems] gcl.src.tar

Description: BOI version of Steiner tree construction, practical and popular for manhattan VLSI routing, generate a Steiner minimum tree for given set of terminals in a layout plane
Platform: | Size: 365568 | Author: Ernesto Liu | Hits:

[Post-TeleCom sofeware systems] PTree.tar

Description: PTree: Find the optimum Steiner tree for a given terminal sequence. Linear runtime complexity. Optimum solution.
Platform: | Size: 140288 | Author: Ernesto Liu | Hits:

[Post-TeleCom sofeware systems] buf_tree_pol.tar

Description: Construct buffered routing tree for VLSI interconnects in a Manhanttan layout plane for a given set of terminals, guarantee polarity of the terminals agree with each other
Platform: | Size: 33792 | Author: Ernesto Liu | Hits:

[Post-TeleCom sofeware systems] Minaret.tar

Description: Minaret: retiming edge-triggered circuit for improved performance and higher clock frequency by moving combinational logic gates across sequential elements
Platform: | Size: 2823168 | Author: Ernesto Liu | Hits:

[Post-TeleCom sofeware systems] FengShui.tar

Description: FengShui: custom ASIC layout placement for gigascale VLSI circuits, for gate array, sea of gate and standard cell designs, scales well into million gate designs
Platform: | Size: 584704 | Author: Ernesto Liu | Hits:

[Post-TeleCom sofeware systems] FSK

Description: System generator code for FSK implementation. Pls enjoy it
Platform: | Size: 9216 | Author: phuc | Hits: