Packet : 27796700de2.rar filelist
DE2_schematics\DE2_outline.pdf
DE2_schematics\DE2_schematics.pdf
DE2_tutorials\tut_initialDE2.pdf
DE2_tutorials\tut_lpms_verilog.pdf
DE2_tutorials\tut_lpms_vhdl.pdf
DE2_tutorials\tut_quartus_intro_schem.pdf
DE2_tutorials\tut_quartus_intro_verilog.pdf
DE2_tutorials\tut_quartus_intro_vhdl.pdf
DE2_tutorials\tut_simulation_verilog.pdf
DE2_tutorials\tut_simulation_vhdl.pdf
DE2_tutorials\tut_timing_verilog.pdf
DE2_tutorials\tut_timing_vhdl.pdf
DE2_tutorials\design_files\DE2_pin_assignments.csv
DE2_tutorials\design_files\addersubtractor.v
DE2_tutorials\design_files\addersubtractor.vhd
DE2_tutorials\design_files\addersubtractor2.v
DE2_tutorials\design_files\addersubtractor2.vhd
DE2_tutorials\design_files
DE2_schematics
DE2_tutorials
DE2_lab_exercises\DE2_pin_assignments.csv
DE2_lab_exercises\DE2_labs_vhdl\lab10_VHDL.pdf
DE2_lab_exercises\DE2_labs_vhdl\lab1_VHDL.pdf
DE2_lab_exercises\DE2_labs_vhdl\lab2_VHDL.pdf
DE2_lab_exercises\DE2_labs_vhdl\lab3_VHDL.pdf
DE2_lab_exercises\DE2_labs_vhdl\lab4_VHDL.pdf
DE2_lab_exercises\DE2_labs_vhdl\lab5_VHDL.pdf
DE2_lab_exercises\DE2_labs_vhdl\lab6_VHDL.pdf
DE2_lab_exercises\DE2_labs_vhdl\lab7_VHDL.pdf
DE2_lab_exercises\DE2_labs_vhdl\lab8_VHDL.pdf
DE2_lab_exercises\DE2_labs_vhdl\lab9_VHDL.pdf
DE2_lab_exercises\DE2_labs_verilog\lab10_Verilog.pdf
DE2_lab_exercises\DE2_labs_verilog\lab1_Verilog.pdf
DE2_lab_exercises\DE2_labs_verilog\lab2_Verilog.pdf
DE2_lab_exercises\DE2_labs_verilog\lab3_Verilog.pdf
DE2_lab_exercises\DE2_labs_verilog\lab4_Verilog.pdf
DE2_lab_exercises\DE2_labs_verilog\lab5_Verilog.pdf
DE2_lab_exercises\DE2_labs_verilog\lab6_Verilog.pdf
DE2_lab_exercises\DE2_labs_verilog\lab7_Verilog.pdf
DE2_lab_exercises\DE2_labs_verilog\lab8_Verilog.pdf
DE2_lab_exercises\DE2_labs_verilog\lab9_Verilog.pdf
DE2_control_panel\DE2_Control_Panel.exe
DE2_control_panel\DE2_USB_API.pof
DE2_control_panel\DE2_USB_API.sof
DE2_control_panel\FTD2XX.DLL
DE2_control_panel\Image_Convert_English.pdf
DE2_control_panel\ImgConv.exe
DE2_control_panel\DE2_USB_API.cdf
DE2_control_panel\db\de2_usb_api.db_info
DE2_control_panel\db\DE2_USB_API.hif
DE2_control_panel\db\DE2_USB_API.cmp.qrpt
DE2_control_panel\db\DE2_USB_API.cbx.xml
DE2_control_panel\db\de2.db_info
DE2_control_panel\db\de2.hif
DE2_control_panel\db\de2.cmp.qrpt
DE2_control_panel\db\de2.cbx.xml
DE2_control_panel\db\de2_usb_api.map.qmsg
DE2_control_panel\db\de2_usb_api.sld_design_entry_dsc.sci
DE2_control_panel\db\de2_usb_api.map.hdb
DE2_control_panel\db\de2_usb_api.cmp.rdb
DE2_control_panel\db\de2.map.qmsg
DE2_control_panel\db\de2.sld_design_entry_dsc.sci
DE2_control_panel\db\de2.map.hdb
DE2_control_panel\db\de2.cmp.rdb
DE2_control_panel\db\de2_usb_api.sld_design_entry.sci
DE2_control_panel\db\de2_usb_api.eco.cdb
DE2_control_panel\db\de2.sld_design_entry.sci
DE2_control_panel\db\de2.eco.cdb
DE2_control_panel\DE2_USB_API.qws
DE2_control_panel\DE2_USB_API.map.rpt
DE2_control_panel\DE2_USB_API.flow.rpt
DE2_control_panel\DE2_USB_API.map.summary
DE2_control_panel\de2.qpf
DE2_control_panel\de2.qsf
DE2_control_panel\de2.map.rpt
DE2_control_panel\de2.flow.rpt
DE2_control_panel\de2.map.summary
DE2_control_panel\de2.qws
DE2_control_panel\de2_usb_api.qpf
DE2_control_panel\de2_usb_api.qsf
DE2_control_panel\sopc_builder_debug_log.txt
DE2_control_panel\.sopc_builder\install.ptf
DE2_control_panel\nios32.ptf
DE2_control_panel\nios32.vhd
DE2_control_panel\nios32.v
DE2_control_panel\nios32.ptf.bak
DE2_lab_exercises\DE2_labs_vhdl
DE2_lab_exercises\DE2_labs_verilog
DE2_control_panel\db
DE2_control_panel\.sopc_builder
DE2_lab_exercises
DE2_control_panel

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