The PCF8563 is a CMOS real-meclock/calendar optimized for low powerconsumption. A programmable clock output, interrupt output and voltage-low detectorare also provided. All address and data are transferred serially via a two-linebidirectional I C-bus. Maximum bus speed is 400 kbits/s. The built-in word address register is incremented automatically after each written or read data byte.

8563
....\模块板
....\......\1602.c
....\......\1602.h
....\......\1602.LST
....\......\1602.OBJ
....\......\8563
....\......\8563.c
....\......\8563.h
....\......\8563.hex
....\......\8563.lnp
....\......\8563.LST
....\......\8563.M51
....\......\8563.OBJ
....\......\8563.Opt
....\......\8563.plg
....\......\8563.Uv2
....\......\8563_Opt.Bak
....\......\8563_Uv2.Bak
....\......\delay.c
....\......\delay.h
....\......\delay.LST
....\......\delay.OBJ
....\......\display.c
....\......\display.h
....\......\display.LST
....\......\display.OBJ
....\......\head.h
....\......\main.c
....\......\main.LST
....\......\main.OBJ
....\......\STARTUP.A51
....\......\STARTUP.LST
....\......\STARTUP.OBJ
....\集成版
....\......\Drivefor1602
....\......\drivefor1602.c
....\......\Drivefor1602.hex
....\......\Drivefor1602.lnp
....\......\drivefor1602.LST
....\......\Drivefor1602.M51
....\......\drivefor1602.OBJ
....\......\Drivefor1602.Opt
....\......\Drivefor1602.plg
....\......\Drivefor1602.Uv2
....\......\Drivefor1602_Opt.Bak
....\......\Drivefor1602_Uv2.Bak
....\......\STARTUP.A51
....\......\STARTUP.LST
....\......\STARTUP.OBJ

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