file contains projects with source code, full description , simulation results .

complete file_hdl_lab
.....................\alu_p.doc
.....................\counter.doc
.....................\multiplier.doc
.....................\Parllel in Serial out.doc
.....................\verilog calculator.doc
.....................\vHDLINDEX.doc
.....................\vhdl_waveforms
.....................\..............\SIMLATION RESULT_alu.doc
.....................\..............\SIMLATION RESULT_multipliert.doc
.....................\..............\SIMLATION RESULT_parallel in serial out.doc

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