Using verilog language to describe the arm7-based processors. Use quartusII+ modelsim se for development and validation of

CPU_reference
.............\adctrl.v
.............\adport.v
.............\ALU.v
.............\ALUctrl.v
.............\BS.v
.............\BSctrl.v
.............\CPSR.v
.............\dbctrl.v
.............\dbport.v
.............\decoder5_32.v
.............\defines.v
.............\FE.v
.............\FEctrl.v
.............\IRDE.v
.............\reg32.v
.............\reg32ctrl.v
.............\RISC_test.v
.............\RISC_top.v
.............\tempctrl.v
.............\tempreg.v

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