68013 I/O trigger int signal. USB simple communication experiments. Will break the signal and I/O interfaces used together.

int and IO
..........\FPGA
..........\....\db
..........\....\..\altsyncram_lk81.tdf
..........\....\..\USB_FPGA.db_info
..........\....\..\USB_FPGA.eco.cdb
..........\....\..\USB_FPGA.sld_design_entry.sci
..........\....\..\wed.wsf
..........\....\prev_cmp_USB_FPGA.qmsg
..........\....\USB_FPGA.asm.rpt
..........\....\USB_FPGA.cdf
..........\....\USB_FPGA.done
..........\....\USB_FPGA.fit.eqn
..........\....\USB_FPGA.fit.rpt
..........\....\USB_FPGA.fit.smsg
..........\....\USB_FPGA.fit.summary
..........\....\USB_FPGA.flow.rpt
..........\....\USB_FPGA.map.eqn
..........\....\USB_FPGA.map.rpt
..........\....\USB_FPGA.map.summary
..........\....\USB_FPGA.pin
..........\....\USB_FPGA.pof
..........\....\USB_FPGA.qpf
..........\....\USB_FPGA.qsf
..........\....\USB_FPGA.qws
..........\....\USB_FPGA.sim.rpt
..........\....\USB_FPGA.sof
..........\....\USB_FPGA.tan.rpt
..........\....\USB_FPGA.tan.summary
..........\....\USB_FPGA.vhd
..........\....\USB_FPGA.vhd.bak
..........\....\USB_FPGA.vwf
..........\....\USB_FPGA_assignment_defaults.qdf
..........\uvision
..........\.......\dscr.a51
..........\.......\dscr.LST
..........\.......\dscr.OBJ
..........\.......\Ezusb.lib
..........\.......\fw.c
..........\.......\fw.LST
..........\.......\fw.OBJ
..........\.......\IntTest
..........\.......\IntTest.bix
..........\.......\IntTest.c
..........\.......\IntTest.hex
..........\.......\IntTest.lnp
..........\.......\IntTest.LST
..........\.......\IntTest.M51
..........\.......\IntTest.OBJ
..........\.......\IntTest.Opt
..........\.......\IntTest.plg
..........\.......\IntTest.Uv2
..........\.......\IntTest.__i
..........\.......\IntTest_Opt.Bak
..........\.......\IntTest_Uv2.Bak
..........\.......\STARTUP.A51
..........\.......\STARTUP.LST
..........\.......\STARTUP.OBJ
..........\.......\USBJmpTb.OBJ

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