CY7C68013A available port FIFO read and write operations, and general FIFO read and write operations the same way. CY7C68013A for each port provide a " empty" signs, " full" signs and " programmable-class" logo. FPGA detect these signals, used to control the process of reading and writing

T2_USB_IN\Doc\RCII-CY1C12开发板USB IN示例说明.doc
.........\...\~$II-CY1C12开发板USB IN示例说明.doc
.........\...\控制面板使用说明（EN）.pdf
.........\Firmware\USB_IN8.hex
.........\Proj\cmp_state.ini
.........\....\db\altsyncram_do82.tdf
.........\....\..\altsyncram_fo82.tdf
.........\....\..\altsyncram_mvo3.tdf
.........\....\..\altsyncram_qvo3.tdf
.........\....\..\altsyncram_svo3.tdf
.........\....\..\altsyncram_uvo3.tdf
.........\....\..\cmpr_j4c.tdf
.........\....\..\cmpr_m4c.tdf
.........\....\..\cmpr_n4c.tdf
.........\....\..\cntr_0k8.tdf
.........\....\..\cntr_4ti.tdf
.........\....\..\cntr_84i.tdf
.........\....\..\cntr_94i.tdf
.........\....\..\cntr_9v7.tdf
.........\....\..\cntr_b4i.tdf
.........\....\..\cntr_bv7.tdf
.........\....\..\cntr_cv7.tdf
.........\....\..\cntr_d4i.tdf
.........\....\..\cntr_dn7.tdf
.........\....\..\cntr_e29.tdf
.........\....\..\cntr_e4i.tdf
.........\....\..\cntr_mo8.tdf
.........\....\..\cntr_nt9.tdf
.........\....\..\cntr_umi.tdf
.........\....\..\decode_9ie.tdf
.........\....\..\decode_9jf.tdf
.........\....\..\fpga2pc.asm.qmsg
.........\....\..\fpga2pc.cbx.xml
.........\....\..\fpga2pc.cmp.cdb
.........\....\..\fpga2pc.cmp.hdb
.........\....\..\fpga2pc.cmp.kpt
.........\....\..\fpga2pc.cmp.logdb
.........\....\..\fpga2pc.cmp.rdb
.........\....\..\fpga2pc.cmp.tdb
.........\....\..\fpga2pc.cmp0.ddb
.........\....\..\fpga2pc.db_info
.........\....\..\fpga2pc.eco.cdb
.........\....\..\fpga2pc.fit.qmsg
.........\....\..\fpga2pc.hier_info
.........\....\..\fpga2pc.hif
.........\....\..\fpga2pc.map.cdb
.........\....\..\fpga2pc.map.hdb
.........\....\..\fpga2pc.map.logdb
.........\....\..\fpga2pc.map.qmsg
.........\....\..\fpga2pc.pre_map.cdb
.........\....\..\fpga2pc.pre_map.hdb
.........\....\..\fpga2pc.rtlv.hdb
.........\....\..\fpga2pc.rtlv_sg.cdb
.........\....\..\fpga2pc.rtlv_sg_swap.cdb
.........\....\..\fpga2pc.sgdiff.cdb
.........\....\..\fpga2pc.sgdiff.hdb
.........\....\..\fpga2pc.sld_design_entry.sci
.........\....\..\fpga2pc.sld_design_entry_dsc.sci
.........\....\..\fpga2pc.syn_hier_info
.........\....\..\fpga2pc.tan.qmsg
.........\....\..\fpga2pc.tis_db_list.ddb
.........\....\..\fpga2pc_cmp.qrpt
.........\....\..\mux_lgc.tdf
.........\....\..\prev_cmp_fpga2pc.asm.qmsg
.........\....\..\prev_cmp_fpga2pc.fit.qmsg
.........\....\..\prev_cmp_fpga2pc.map.qmsg
.........\....\..\prev_cmp_fpga2pc.tan.qmsg
.........\....\..\prev_cmp_USB_IN.qmsg
.........\....\..\USB_IN.smp_dump.txt
.........\....\fpga2pc.asm.rpt
.........\....\fpga2pc.bdf
.........\....\fpga2pc.bsf
.........\....\fpga2pc.cdf
.........\....\fpga2pc.done
.........\....\fpga2pc.dpf
.........\....\fpga2pc.fit.eqn
.........\....\fpga2pc.fit.rpt
.........\....\fpga2pc.fit.smsg
.........\....\fpga2pc.fit.summary
.........\....\fpga2pc.flow.rpt
.........\....\fpga2pc.jdi
.........\....\fpga2pc.map.eqn
.........\....\fpga2pc.map.rpt
.........\....\fpga2pc.map.summary
.........\....\fpga2pc.pin
.........\....\fpga2pc.pof
.........\....\fpga2pc.qsf
.........\....\fpga2pc.sof
.........\....\fpga2pc.stp
.........\....\fpga2pc.tan.rpt
.........\....\fpga2pc.tan.summary
.........\....\fpga2pc_assignment_defaults.qdf
.........\....\incremental_db\compiled_partitions\fpga2pc.root_partition.map.kpt
.........\....\..............\README
.........\....\stp1.stp
.........\....\USB_IN.qpf
.........\....\USB_IN.qws
.........\Src\fpga2pc.v
.........\...\fpga2pc.v.bak
.........\Proj\incremental_db\compiled_partitions

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