this a de2 project with the fucntion of rsr232 , keyboard and VGA.... everything is workable..

tetris
......\tetris
......\......\DE2_VGA3
......\......\........\characterrom.qip
......\......\........\characterrom.v
......\......\........\characterrom_bb.v
......\......\........\characterrom_wave0.jpg
......\......\........\characterrom_waveforms.html
......\......\........\DE2_Default.asm.rpt
......\......\........\DE2_Default.cdf
......\......\........\DE2_Default.done
......\......\........\DE2_Default.fit.eqn
......\......\........\DE2_Default.fit.rpt
......\......\........\DE2_Default.fit.smsg
......\......\........\DE2_Default.fit.summary
......\......\........\DE2_Default.flow.rpt
......\......\........\DE2_Default.map.eqn
......\......\........\DE2_Default.map.rpt
......\......\........\DE2_Default.map.summary
......\......\........\DE2_Default.pin
......\......\........\DE2_Default.pof
......\......\........\DE2_Default.qpf
......\......\........\DE2_Default.qsf
......\......\........\DE2_Default.tan.rpt
......\......\........\DE2_Default.sof
......\......\........\DE2_Default.v.bak
......\......\........\DE2_Default.tan.summary
......\......\........\DE2_Default.v
......\......\........\sopc_builder_log.txt
......\......\........\DE2_Default_assignment_defaults.qdf
......\......\........\README.txt
......\......\........\Reset_Delay.v
......\......\........\VGA_Audio_PLL.v
......\......\........\sdrampll_waveforms.html
......\......\........\sdrampll_wave0.jpg
......\......\........\TETRISCPU.sopc
......\......\........\sdrampll.ppf
......\......\........\sdrampll.v
......\......\........\sdrampll_bb.v
......\......\........\sdrampll.qip
......\......\........\TETRISCPU.sopcinfo
......\......\........\TETRISCPU.qip
......\......\........\sopc_add_qip_file.tcl
......\......\........\TETRISCPU.ptf
......\......\........\TETRISCPU.ptf.pre_generation_ptf
......\......\........\TETRISCPU.ptf.bak
......\......\........\TETRISCPU.v
......\......\........\TETRISCPU_log.txt
......\......\........\sdram_test_component.v
......\......\........\cpu_ic_tag_ram.mif
......\......\........\cpu_bht_ram.mif
......\......\........\cpu_rf_ram_a.mif
......\......\........\cpu_rf_ram_b.mif
......\......\........\cpu_dc_tag_ram.mif
......\......\........\cpu_ociram_default_contents.mif
......\......\........\cpu.sdc
......\......\........\cpu_test_bench.v
......\......\........\cpu_mult_cell.v
......\......\........\cpu_jtag_debug_module_tck.v
......\......\........\cpu_jtag_debug_module_sysclk.v
......\......\........\cpu_jtag_debug_module_wrapper.v
......\......\........\cpu.v
......\......\........\cpu.ocp
......\......\........\jtag_uart.v
......\......\........\sdram.v
......\......\........\outputsramdata.v
......\......\........\inputxcoord.v
......\......\........\inputycoord.v
......\......\........\outputxcoord.v
......\......\........\outputycoord.v
......\......\........\inputsramdata.v
......\......\........\TETRISCPU.bsf
......\......\........\TETRISCPU_generation_script
......\......\........\TETRISCPU_setup_quartus.tcl
......\......\........\DE2_Default.jdi
......\......\........\DE2_Default.map.smsg
......\......\........\keyboardscancode.v
......\......\........\fifo_waveforms.html
......\......\........\fifo_wave0.jpg
......\......\........\keycounter.v
......\......\........\othermadeline.v
......\......\........\uart.v
......\......\........\fifo.qip
......\......\........\uart1.v
......\......\........\uartirda.v
......\......\........\othermadelineread.v
......\......\........\othermadelinewrite.v
......\......\........\row19.v
......\......\........\row18.v
......\......\........\row17.v
......\......\........\row16.v
......\......\........\row15.v
......\......\........\row14.v
......\......\........\row13.v
......\......\........\row12.v
......\......\........\row11.v
......\......\........\row10.v
......\......\........\row9.v
......\......\........\row8.v
......\......\........\row7.v

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