FPGA design using a direct digital synthesizer (DDS), requires the ability to set the keyboard output sine wave, triangle wave and square wave output waveform frequency from the keyboard input settings, LCD display shows the output waveform type and frequency, output frequency range 10Hz-20kHz, step 0.5Hz.

DDS1-2\data_rom.bsf
......\data_rom.vhd
......\.b\altsyncram_k6l.tdf
......\..\altsyncram_luk.tdf
......\..\altsyncram_muk.tdf
......\..\altsyncram_nuk.tdf
......\..\altsyncram_ouk.tdf
......\..\altsyncram_rrt.tdf
......\..\altsyncram_tk92.tdf
......\..\DDS.asm.qmsg
......\..\DDS.cbx.xml
......\..\DDS.cmp.cdb
......\..\DDS.cmp.hdb
......\..\DDS.cmp.qrpt
......\..\DDS.cmp.rdb
......\..\DDS.cmp.tdb
......\..\DDS.cmp0.ddb
......\..\DDS.dbp
......\..\DDS.db_info
......\..\DDS.eco.cdb
......\..\DDS.fit.qmsg
......\..\DDS.hier_info
......\..\DDS.hif
......\..\DDS.map.cdb
......\..\DDS.map.hdb
......\..\DDS.map.qmsg
......\..\DDS.pre_map.cdb
......\..\DDS.pre_map.hdb
......\..\DDS.psp
......\..\DDS.rtlv.hdb
......\..\DDS.rtlv_sg.cdb
......\..\DDS.rtlv_sg_swap.cdb
......\..\DDS.sgdiff.cdb
......\..\DDS.sgdiff.hdb
......\..\DDS.signalprobe.cdb
......\..\DDS.sld_design_entry.sci
......\..\DDS.sld_design_entry_dsc.sci
......\..\DDS.smp_dump.txt
......\..\DDS.syn_hier_info
......\..\DDS.tan.qmsg
......\..\DDS0.rtl.mif
......\..\decode_9ie.tdf
......\..\LCD128640.rtl.mif
......\DDS.asm.rpt
......\DDS.bdf
......\DDS.cdf
......\DDS.done
......\DDS.fit.eqn
......\DDS.fit.rpt
......\DDS.fit.summary
......\DDS.flow.rpt
......\DDS.map.eqn
......\DDS.map.rpt
......\DDS.map.summary
......\DDS.pin
......\DDS.pof
......\DDS.qpf
......\DDS.qsf
......\DDS.qws
......\DDS.sof
......\DDS.tan.rpt
......\DDS.tan.summary
......\div.bsf
......\div.vhd
......\div2.bsf
......\div2.vhd
......\get_addr.bsf
......\get_addr.vhd
......\keyboard.bsf
......\keyboard.vhd
......\LCD12864.bsf
......\lcd12864.vhd
......\wave.hex
......\新建 文本文档.txt
......\db
DDS1-2

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