Introduction - If you have any usage issues, please Google them yourself
jpeg decoder circuit, is prepared verilog, synthesis, very practical value.
Packet : 19854820djpeg_vlsi.rar filelist
djpeg
djpeg\CVS
djpeg\CVS\Entries
djpeg\CVS\Repository
djpeg\CVS\Root
djpeg\c_model
djpeg\c_model\CVS
djpeg\c_model\CVS\Entries
djpeg\c_model\CVS\Repository
djpeg\c_model\CVS\Root
djpeg\c_model\djpeg.c
djpeg\docs
djpeg\docs\CVS
djpeg\docs\CVS\Entries
djpeg\docs\CVS\Repository
djpeg\docs\CVS\Root
djpeg\image
djpeg\image\CVS
djpeg\image\CVS\Entries
djpeg\image\CVS\Repository
djpeg\image\CVS\Root
djpeg\image\test.jpg
djpeg\readme.txt
djpeg\src
djpeg\src\CVS
djpeg\src\CVS\Entries
djpeg\src\CVS\Repository
djpeg\src\CVS\Root
djpeg\src\jpeg_decode.v
djpeg\src\jpeg_decode_fsm.v
djpeg\src\jpeg_dht.v
djpeg\src\jpeg_dqt.v
djpeg\src\jpeg_haffuman.v
djpeg\src\jpeg_hm_decode.v
djpeg\src\jpeg_idct.v
djpeg\src\jpeg_idctb.v
djpeg\src\jpeg_idctx.v
djpeg\src\jpeg_idcty.v
djpeg\src\jpeg_regdata.v
djpeg\src\jpeg_ycbcr.v
djpeg\src\jpeg_ycbcr2rgb.v
djpeg\src\jpeg_ycbcr_mem.v
djpeg\src\jpeg_ziguzagu.v
djpeg\src\jpeg_ziguzagu_reg.v
djpeg\testbench
djpeg\testbench\convbtoh
djpeg\testbench\convbtoh.c
djpeg\testbench\convsim
djpeg\testbench\convsim.c
djpeg\testbench\CVS
djpeg\testbench\CVS\Entries
djpeg\testbench\CVS\Repository
djpeg\testbench\CVS\Root
djpeg\testbench\jpeg_test.v
djpeg\testbench\run.ms