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interrupts

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  • Update : 2012-11-26
  • Size : 121kb
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  • Author :go***
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Introduction - If you have any usage issues, please Google them yourself
This example application demonstrates the interrupt preemption and tail-chaining capabilities of Cortex-M3 microprocessor and NVIC. Nested interrupts are synthesized when the interrupts have the same priority, increasing priorities, and decreasing priorities. With increasing priorities, preemption will occur in the other two cases tail-chaining will occur. The currently pending interrupts and the currently executing interrupt will be displayed on the OLED GPIO pins B0, B1 and B2 will be asserted upon interrupt handler entry and de-asserted before interrupt handler exit so that the off-to-on time can be observed with a scope or logic analyzer to see the speed of tail-chaining (for the two cases where tail-chaining is occurring).
Packet file list
(Preview for download)
interrupts
..........\codered
..........\.......\interrupts.axf
..........\.......\interrupts.bin
..........\cr_project.xml
..........\ewarm
..........\.....\Exe
..........\.....\...\interrupts.bin
..........\.....\...\interrupts.out
..........\gcc
..........\...\interrupts.axf
..........\...\interrupts.bin
..........\interrupts.c
..........\interrupts.ewd
..........\interrupts.ewp
..........\interrupts.icf
..........\interrupts.ld
..........\interrupts.Opt
..........\interrupts.sct
..........\interrupts.Uv2
..........\interrupts_codered.ld
..........\interrupts_interrupts.dep
..........\interrupts_Opt.Bak
..........\interrupts_sourcerygxx.ld
..........\interrupts_Uv2.Bak
..........\lm3s6965-rom.ld
..........\Makefile
..........\readme.txt
..........\rvmdk
..........\.....\interrupts.axf
..........\.....\interrupts.bin
..........\.....\interrupts.plg
..........\sourcerygxx
..........\...........\interrupts.axf
..........\...........\interrupts.bin
..........\startup_codered.c
..........\startup_ewarm.c
..........\startup_gcc.c
..........\startup_rvmdk.S
..........\startup_sourcerygxx.c
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