Fusion Series ACTEL chip company based development of embedded projects. Achieved SD card reader function, the file including the Libero Keil development projects and the development of the project.

SD\keil\SD\config.h
..\....\..\define.h
..\....\..\ExtDll.iex
..\....\..\MAIN\config.h
..\....\..\....\define.h
..\....\..\....\main.c
..\....\..\....\regmap.h
..\....\..\main.c
..\....\..\main.crf
..\....\..\main.d
..\....\..\main.o
..\....\..\print.axf
..\....\..\print.htm
..\....\..\print.lnp
..\....\..\print.map
..\....\..\print.Opt
..\....\..\print.plg
..\....\..\print.sct
..\....\..\print.tra
..\....\..\print.Uv2
..\....\..\print_Opt.Bak
..\....\..\print_sct.Bak
..\....\..\print_Target 1.dep
..\....\..\print_Uv2.Bak
..\....\..\regmap.h
..\....\..\SD\sdcmd.c
..\....\..\..\sdcmd.h
..\....\..\..\sdconfig.h
..\....\..\..\sdcrc.c
..\....\..\..\sdcrc.h
..\....\..\..\sddriver.c
..\....\..\..\sddriver.h
..\....\..\..\sdhal.c
..\....\..\..\sdhal.h
..\....\..\SD.Opt
..\....\..\SD.Uv2
..\....\..\sdcmd.c
..\....\..\sdcmd.crf
..\....\..\sdcmd.d
..\....\..\sdcmd.h
..\....\..\sdcmd.o
..\....\..\sdconfig.h
..\....\..\sdcrc.c
..\....\..\sdcrc.crf
..\....\..\sdcrc.d
..\....\..\sdcrc.h
..\....\..\sdcrc.o
..\....\..\sddriver.c
..\....\..\sddriver.crf
..\....\..\sddriver.d
..\....\..\sddriver.h
..\....\..\sddriver.o
..\....\..\sdhal.c
..\....\..\sdhal.crf
..\....\..\sdhal.d
..\....\..\sdhal.h
..\....\..\sdhal.o
..\....\..\SD_Opt.Bak
..\....\..\SD_Target 1.dep
..\....\..\SD_Uv2.Bak
..\....\..\Startup.lst
..\....\..\Startup.o
..\....\..\Startup.s
..\....\..\STDIO.H
..\....\..\UART\UART.c
..\....\..\....\UART.h
..\....\..\UART.c
..\....\..\uart.crf
..\....\..\uart.d
..\....\..\UART.h
..\....\..\uart.o
..\Libero\SD\constraint\CortexM1_top.dtf\core.ddf
..\......\..\..........\CortexM1_top.pdc
..\......\..\..reconsole\common\CoreAHB2APB\CoreAHB2APB.cxf
..\......\..\...........\......\...........\rtl\verilog\o\CoreAHB2APB.v
..\......\..\...........\......\.......Lite\CoreAHBLite.cxf
..\......\..\...........\......\...........\coreparameters.v
..\......\..\...........\......\...........\rtl\verilog\o\CoreAHBLite.v
..\......\..\...........\......\...........\...\.......\.\Decoder.v
..\......\..\...........\......\...........\...\.......\.\DefaultSlave.v
..\......\..\...........\......\...........\...\.......\.\MuxS2M.v
..\......\..\...........\......\.....PB\CoreAPB.cxf
..\......\..\...........\......\.......\coreparameters.v
..\......\..\...........\......\.......\rtl\verilog\o\CoreAPB.v
..\......\..\...........\......\.......\...\.......\.\MuxP2B.v
..\......\..\...........\......\....MemCtrl\bfm\CoreMemCtrl_scriptlet.bfm
..\......\..\...........\......\...........\CoreMemCtrl.cxf
..\......\..\...........\......\...........\coreparameters.v
..\......\..\...........\......\...........\rtl\verilog\o\CoreMemCtrl.v
..\......\..\...........\......\....Remap\bfm\CoreRemap_scriptlet.bfm
..\......\..\...........\......\.........\CoreRemap.cxf
..\......\..\...........\......\.........\rtl\verilog\o\CoreRemap.v
..\......\..\...........\......\.ORESPI\coreparameters.v
..\......\..\...........\......\.......\CORESPI.cxf
..\......\..\...........\......\.......\mti\lib_vlog_obs\CORESPI_LIB\_info
..\......\..\...........\......\.......\...\scripts\wave_usertb_vlog.do
..\......\..\...........\......\.......\rtl\vlog\core_obfuscated\corespi.v
..\......\..\...........\......\.......\...\....\...............\corespi_sfr.v
..\......\..\...........\......\.......\...\....\...............\spi_master.v
..\......\..\...........\......\.......\...\....\...............\spi_slave.v

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