Development environment for TI' s CCS software. The code is the TMS320C6713 EDMA peripheral data handling routines.

EDMA_EXTRIG_test\cc_build_Debug.log
................\db\altsyncram_mmi2.tdf
................\..\cmpr_60i.tdf
................\..\cntr_4tf.tdf
................\..\cntr_5kg.tdf
................\..\cntr_9jf.tdf
................\..\cntr_doe.tdf
................\..\cntr_jph.tdf
................\..\decode_3pa.tdf
................\..\decode_cpi.tdf
................\..\FPGA.asm.qmsg
................\..\FPGA.asm_labs.ddb
................\..\FPGA.cbx.xml
................\..\FPGA.cmp.cdb
................\..\FPGA.cmp.hdb
................\..\FPGA.cmp.kpt
................\..\FPGA.cmp.logdb
................\..\FPGA.cmp.rdb
................\..\FPGA.cmp.tdb
................\..\FPGA.cmp0.ddb
................\..\FPGA.cmp2.ddb
................\..\FPGA.dbp
................\..\FPGA.db_info
................\..\FPGA.eco.cdb
................\..\FPGA.fit.qmsg
................\..\FPGA.hier_info
................\..\FPGA.hif
................\..\FPGA.map.cdb
................\..\FPGA.map.hdb
................\..\FPGA.map.logdb
................\..\FPGA.map.qmsg
................\..\FPGA.pre_map.cdb
................\..\FPGA.pre_map.hdb
................\..\FPGA.psp
................\..\FPGA.rtlv.hdb
................\..\FPGA.rtlv_sg.cdb
................\..\FPGA.rtlv_sg_swap.cdb
................\..\FPGA.sgdiff.cdb
................\..\FPGA.sgdiff.hdb
................\..\FPGA.signalprobe.cdb
................\..\FPGA.sld_design_entry.sci
................\..\FPGA.sld_design_entry_dsc.sci
................\..\FPGA.syn_hier_info
................\..\FPGA.tan.qmsg
................\..\mux_gjb.tdf
................\Debug\EDMA_EXTRIG_test.map
................\.....\EDMA_EXTRIG_test.obj
................\.....\EDMA_EXTRIG_test.out
................\.....\vectors.obj
................\Debug.lkf
................\EDMA_EXTRIG_test.c
................\EDMA_EXTRIG_test.cmd
................\.................CS_\FILE.CDX
................\....................\FILE.DBF
................\....................\FILE.FPT
................\....................\SYMBOL.CDX
................\....................\SYMBOL.DBF
................\....................\SYMBOL.FPT
................\EDMA_EXTRIG_test.paf2
................\EDMA_EXTRIG_test.pjt
................\EDMA_EXTRIG_test.sbl
................\FPGA\db\altsyncram_1ri2.tdf
................\....\..\altsyncram_c1l1.tdf
................\....\..\cmpr_4vh.tdf
................\....\..\cntr_2sf.tdf
................\....\..\cntr_3jg.tdf
................\....\..\cntr_7if.tdf
................\....\..\cntr_bne.tdf
................\....\..\cntr_hoh.tdf
................\....\..\decode_1oa.tdf
................\....\..\decode_aoi.tdf
................\....\..\FPGA.db_info
................\....\..\mux_eib.tdf
................\....\FPGA.asm.rpt
................\....\FPGA.cdf
................\....\FPGA.done
................\....\FPGA.dpf
................\....\FPGA.fit.rpt
................\....\FPGA.fit.smsg
................\....\FPGA.fit.summary
................\....\FPGA.flow.rpt
................\....\FPGA.map.rpt
................\....\FPGA.map.summary
................\....\FPGA.pin
................\....\FPGA.pof
................\....\FPGA.qpf
................\....\FPGA.qsf
................\....\FPGA.sof
................\....\FPGA.tan.rpt
................\....\FPGA.tan.summary
................\....\FPGA.tcl
................\....\FPGA.ttf
................\....\FPGA.v
................\....\FPGA_assignment_defaults.qdf
................\....\stp1.stp
................\reg6713.h
................\vectors.asm
................\宏定义中的extern_far_C的问题.txt
................\宏定义中的extern_far_C的问题.txt.bak
................\心得csl宏定义解析.txt

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