I wrote an FX2 chip used by ps on altera FPGA configuration of a process, including the pc client and FX2 firmware source

Packet : 117143177fx2_ps_config.rar filelist
0721\TestIn_ChannelTest_AFE\data\channel.txt
0721\TestIn_ChannelTest_AFE\ReadMe.txt
0721\usb_full\dscr.LST
0721\usb_full\fw.LST
0721\usb_full\FX2_full.LST
0721\usb_full\gpif.LST
0721\TestIn_ChannelTest_AFE\Complex.h
0721\TestIn_ChannelTest_AFE\Constellation.h
0721\TestIn_ChannelTest_AFE\defs.h
0721\TestIn_ChannelTest_AFE\FFT.h
0721\TestIn_ChannelTest_AFE\PRBS.h
0721\TestIn_ChannelTest_AFE\StdAfx.h
0721\usb_full\fw.c
0721\usb_full\FX2_full.c
0721\usb_full\gpif.c
0721\TestIn_ChannelTest_AFE\Complex.cpp
0721\TestIn_ChannelTest_AFE\Constellation.cpp
0721\TestIn_ChannelTest_AFE\FFT.cpp
0721\TestIn_ChannelTest_AFE\PRBS.cpp
0721\TestIn_ChannelTest_AFE\StdAfx.cpp
0721\TestIn_ChannelTest_AFE\TestIn.cpp
0721\usb_full\FX2_full.c.bak
0721\usb_full\FX2_full.Uv2.bak
0721\usb_full\FX2_full_Opt.Bak
0721\usb_full\FX2_full_Uv2.Bak
0721\usb_full\dscr.OBJ
0721\usb_full\fw.OBJ
0721\usb_full\FX2_full.OBJ
0721\usb_full\gpif.OBJ
0721\usb_full\FX2_FULL
0721\usb_full\gpif.__i
0721\usb_full\dscr.a51
0721\TestIn_ChannelTest_AFE\data\data.dat
0721\TestIn_ChannelTest_AFE\data\data1.dat
0721\TestIn_ChannelTest_AFE\TestIn.dsp
0721\TestIn_ChannelTest_AFE\TestIn.dsw
0721\usb_full\FX2_to_extsyncFIFO.gpf
0721\usb_full\FX2_FULL.hex
0721\usb_full\FX2_full.iic
0721\usb_full\FX2_FULL.lnp
0721\usb_full\FX2_FULL.M51
0721\TestIn_ChannelTest_AFE\TestIn.ncb
0721\usb_full\FX2_full.Opt
0721\TestIn_ChannelTest_AFE\TestIn.opt
0721\usb_full\FX2_FULL.plg
0721\TestIn_ChannelTest_AFE\TestIn.plg
0721\TestIn_ChannelTest_AFE\TestIn.positions
0721\usb_full\FX2_full.Uv2
0721\TestIn_ChannelTest_AFE.rar
0721\usb_full.rar
0721\TestIn_ChannelTest_AFE\data
0721\TestIn_ChannelTest_AFE\Debug
0721\TestIn_ChannelTest_AFE\Release
0721\TestIn_ChannelTest_AFE
0721\usb_full
0721

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