This to use verilog language is written a and decoder program, in DE2 minimum system board validated

my38decoder
...........\LED.sft
...........\LED.vo
...........\LED_modelsim.xrf
...........\LED_v.sdo
...........\db
...........\..\mydecorder.asm.qmsg
...........\..\mydecorder.asm_labs.ddb
...........\..\mydecorder.cbx.xml
...........\..\mydecorder.cmp.bpm
...........\..\mydecorder.cmp.cdb
...........\..\mydecorder.cmp.ecobp
...........\..\mydecorder.cmp.hdb
...........\..\mydecorder.cmp.kpt
...........\..\mydecorder.cmp.logdb
...........\..\mydecorder.cmp.rdb
...........\..\mydecorder.cmp.tdb
...........\..\mydecorder.cmp0.ddb
...........\..\mydecorder.cmp_merge.kpt
...........\..\mydecorder.db_info
...........\..\mydecorder.eco.cdb
...........\..\mydecorder.eda.qmsg
...........\..\mydecorder.fit.qmsg
...........\..\mydecorder.hier_info
...........\..\mydecorder.hif
...........\..\mydecorder.map.bpm
...........\..\mydecorder.map.cdb
...........\..\mydecorder.map.ecobp
...........\..\mydecorder.map.hdb
...........\..\mydecorder.map.kpt
...........\..\mydecorder.map.logdb
...........\..\mydecorder.map.qmsg
...........\..\mydecorder.map_bb.cdb
...........\..\mydecorder.map_bb.hdb
...........\..\mydecorder.map_bb.hdbx
...........\..\mydecorder.map_bb.logdb
...........\..\mydecorder.pre_map.cdb
...........\..\mydecorder.pre_map.hdb
...........\..\mydecorder.psp
...........\..\mydecorder.rtlv.hdb
...........\..\mydecorder.rtlv_sg.cdb
...........\..\mydecorder.rtlv_sg_swap.cdb
...........\..\mydecorder.sgdiff.cdb
...........\..\mydecorder.sgdiff.hdb
...........\..\mydecorder.sld_design_entry.sci
...........\..\mydecorder.sld_design_entry_dsc.sci
...........\..\mydecorder.syn_hier_info
...........\..\mydecorder.tan.qmsg
...........\..\mydecorder.tis_db_list.ddb
...........\..\mydecorder.tmw_info
...........\..\prev_cmp_mydecorder.asm.qmsg
...........\..\prev_cmp_mydecorder.fit.qmsg
...........\..\prev_cmp_mydecorder.map.qmsg
...........\..\prev_cmp_mydecorder.tan.qmsg
...........\example.sft
...........\example.vo
...........\example_modelsim.xrf
...........\example_v.sdo
...........\flow_led.sft
...........\flow_led.vo
...........\flow_led_modelsim.xrf
...........\flow_led_v.sdo
...........\incremental_db
...........\..............\README
...........\..............\compiled_partitions
...........\..............\...................\mydecorder.root_partition.cmp.atm
...........\..............\...................\mydecorder.root_partition.cmp.dfp
...........\..............\...................\mydecorder.root_partition.cmp.hdbx
...........\..............\...................\mydecorder.root_partition.cmp.kpt
...........\..............\...................\mydecorder.root_partition.cmp.logdb
...........\..............\...................\mydecorder.root_partition.cmp.rcf
...........\..............\...................\mydecorder.root_partition.map.atm
...........\..............\...................\mydecorder.root_partition.map.dpi
...........\..............\...................\mydecorder.root_partition.map.hdbx
...........\..............\...................\mydecorder.root_partition.map.kpt
...........\modelsim.ini
...........\msim_transcript
...........\my24decoder.sft
...........\my24decoder.vo
...........\my24decoder_modelsim.xrf
...........\my24decoder_v.sdo
...........\mycounter.sft
...........\mycounter.vo
...........\mycounter_modelsim.xrf
...........\mycounter_v.sdo
...........\mydecorder.asm.rpt
...........\mydecorder.done
...........\mydecorder.eda.rpt
...........\mydecorder.fit.rpt
...........\mydecorder.fit.smsg
...........\mydecorder.fit.summary
...........\mydecorder.flow.rpt
...........\mydecorder.map.rpt
...........\mydecorder.map.summary
...........\mydecorder.pin
...........\mydecorder.pof
...........\mydecorder.qpf
...........\mydecorder.qsf
...........\mydecorder.qws
...........\mydecorder.sft

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