NOIS II This is the IP CORES I2C is a good thing to learn FPGA ah yes good things

Packet : 15883886i2c.rar filelist
i2c\bench\verilog\CVS\Entries
i2c\bench\verilog\CVS\Repository
i2c\bench\verilog\CVS\Root
i2c\bench\verilog\i2c_slave_model.v
i2c\bench\verilog\spi_slave_model.v
i2c\bench\verilog\tst_bench_top.v
i2c\bench\verilog\wb_master_model.v
i2c\doc\i2c_specs.pdf
i2c\doc\src\I2C_specs.doc
i2c\rtl\verilog\i2c_master_bit_ctrl.v
i2c\rtl\verilog\i2c_master_byte_ctrl.v
i2c\rtl\verilog\i2c_master_defines.v
i2c\rtl\verilog\i2c_master_top.v
i2c\rtl\verilog\timescale.v
i2c\rtl\vhdl\I2C.VHD
i2c\rtl\vhdl\i2c_master_bit_ctrl.vhd
i2c\rtl\vhdl\i2c_master_byte_ctrl.vhd
i2c\rtl\vhdl\i2c_master_top.vhd
i2c\rtl\vhdl\readme
i2c\rtl\vhdl\tst_ds1621.vhd
i2c\software\include\oc_i2c_master.h
i2c\bench\verilog\CVS
i2c\bench\verilog
i2c\doc\src
i2c\rtl\verilog
i2c\rtl\vhdl
i2c\software\include
i2c\bench
i2c\doc
i2c\rtl
i2c\software
i2c

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