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fifo12_12

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  • Update : 2013-09-09
  • Size : 565kb
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  • Author :曾****
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Introduction - If you have any usage issues, please Google them yourself
Synchronous fifo, to achieve synchronization of the buffer, the hope that useful
Packet file list
(Preview for download)


fifo12_12\FIFO\and4.v
.........\....\and4b1.v
.........\....\and4b4.v
.........\....\fifoctlr_cc.v
.........\....\fifoctlr_cc.v.bak
.........\....\fifoctlr_cc_tb.v
.........\....\fifoctlr_cc_tb.v.bak
.........\....\test.cr.mti
.........\....\test.mpf
.........\....\vsim.wlf
.........\....\work\and4\verilog.asm
.........\....\....\....\_primary.dat
.........\....\....\....\_primary.dbs
.........\....\....\....\_primary.vhd
.........\....\....\....b1\verilog.asm
.........\....\....\......\_primary.dat
.........\....\....\......\_primary.dbs
.........\....\....\......\_primary.vhd
.........\....\....\.....4\verilog.asm
.........\....\....\......\_primary.dat
.........\....\....\......\_primary.dbs
.........\....\....\......\_primary.vhd
.........\....\....\fifoctlr_cc\verilog.asm
.........\....\....\...........\_primary.dat
.........\....\....\...........\_primary.dbs
.........\....\....\...........\_primary.vhd
.........\....\....\..........._tb\verilog.asm
.........\....\....\..............\_primary.dat
.........\....\....\..............\_primary.dbs
.........\....\....\..............\_primary.vhd
.........\....\....\glbl\verilog.asm
.........\....\....\....\_primary.dat
.........\....\....\....\_primary.dbs
.........\....\....\....\_primary.vhd
.........\....\....\_info
.........\....\....\_vmake
.........\....\....\and4
.........\....\....\and4b1
.........\....\....\and4b4
.........\....\....\fifoctlr_cc
.........\....\....\fifoctlr_cc_tb
.........\....\....\glbl
.........\....\....\_temp
.........\....\work
.........\FIFO
fifo12_12
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