traffic lights at a crossroads. V file controlled by PC UART. Including testbench , available FPGA cycloneII DE270 run the simulation.

CMOS_proj2_RTL
..............\.sopc_builder
..............\.............\filters.xml
..............\CMOS_proj2_RTL.asm.rpt
..............\CMOS_proj2_RTL.done
..............\CMOS_proj2_RTL.dpf
..............\CMOS_proj2_RTL.eda.rpt
..............\CMOS_proj2_RTL.fit.rpt
..............\CMOS_proj2_RTL.fit.smsg
..............\CMOS_proj2_RTL.fit.summary
..............\CMOS_proj2_RTL.flow.rpt
..............\CMOS_proj2_RTL.map.rpt
..............\CMOS_proj2_RTL.map.smsg
..............\CMOS_proj2_RTL.map.summary
..............\CMOS_proj2_RTL.pin
..............\CMOS_proj2_RTL.pof
..............\CMOS_proj2_RTL.qpf
..............\CMOS_proj2_RTL.qsf
..............\CMOS_proj2_RTL.qws
..............\CMOS_proj2_RTL.sof
..............\CMOS_proj2_RTL.tan.rpt
..............\CMOS_proj2_RTL.tan.summary
..............\CMOS_proj2_RTL.v
..............\CMOS_proj2_RTL.v.bak
..............\CMOS_proj2_RTL_nativelink_simulation.rpt
..............\db
..............\..\add_sub_lkc.tdf
..............\..\add_sub_mkc.tdf
..............\..\alt_u_div_gve.tdf
..............\..\alt_u_div_ove.tdf
..............\..\CMOS_proj2_RTL.asm.qmsg
..............\..\CMOS_proj2_RTL.asm_labs.ddb
..............\..\CMOS_proj2_RTL.cbx.xml
..............\..\CMOS_proj2_RTL.cmp.bpm
..............\..\CMOS_proj2_RTL.cmp.cdb
..............\..\CMOS_proj2_RTL.cmp.ecobp
..............\..\CMOS_proj2_RTL.cmp.hdb
..............\..\CMOS_proj2_RTL.cmp.kpt
..............\..\CMOS_proj2_RTL.cmp.logdb
..............\..\CMOS_proj2_RTL.cmp.rdb
..............\..\CMOS_proj2_RTL.cmp.tdb
..............\..\CMOS_proj2_RTL.cmp0.ddb
..............\..\CMOS_proj2_RTL.cmp_merge.kpt
..............\..\CMOS_proj2_RTL.db_info
..............\..\CMOS_proj2_RTL.eco.cdb
..............\..\CMOS_proj2_RTL.eda.qmsg
..............\..\CMOS_proj2_RTL.fit.qmsg
..............\..\CMOS_proj2_RTL.hier_info
..............\..\CMOS_proj2_RTL.hif
..............\..\CMOS_proj2_RTL.lpc.html
..............\..\CMOS_proj2_RTL.lpc.rdb
..............\..\CMOS_proj2_RTL.lpc.txt
..............\..\CMOS_proj2_RTL.map.bpm
..............\..\CMOS_proj2_RTL.map.cdb
..............\..\CMOS_proj2_RTL.map.ecobp
..............\..\CMOS_proj2_RTL.map.hdb
..............\..\CMOS_proj2_RTL.map.kpt
..............\..\CMOS_proj2_RTL.map.logdb
..............\..\CMOS_proj2_RTL.map.qmsg
..............\..\CMOS_proj2_RTL.map_bb.cdb
..............\..\CMOS_proj2_RTL.map_bb.hdb
..............\..\CMOS_proj2_RTL.map_bb.logdb
..............\..\CMOS_proj2_RTL.pre_map.cdb
..............\..\CMOS_proj2_RTL.pre_map.hdb
..............\..\CMOS_proj2_RTL.rpp.qmsg
..............\..\CMOS_proj2_RTL.rtlv.hdb
..............\..\CMOS_proj2_RTL.rtlv_sg.cdb
..............\..\CMOS_proj2_RTL.rtlv_sg_swap.cdb
..............\..\CMOS_proj2_RTL.sgate.rvd
..............\..\CMOS_proj2_RTL.sgate_sm.rvd
..............\..\CMOS_proj2_RTL.sgdiff.cdb
..............\..\CMOS_proj2_RTL.sgdiff.hdb
..............\..\CMOS_proj2_RTL.sld_design_entry.sci
..............\..\CMOS_proj2_RTL.sld_design_entry_dsc.sci
..............\..\CMOS_proj2_RTL.smp_dump.txt
..............\..\CMOS_proj2_RTL.syn_hier_info
..............\..\CMOS_proj2_RTL.tan.qmsg
..............\..\CMOS_proj2_RTL.tis_db_list.ddb
..............\..\CMOS_proj2_RTL.tmw_info
..............\..\CMOS_proj2_RTL_global_asgn_op.abo
..............\..\lpm_divide_1dm.tdf
..............\..\lpm_divide_45m.tdf
..............\..\lpm_divide_t4m.tdf
..............\..\prev_cmp_CMOS_proj2_RTL.asm.qmsg
..............\..\prev_cmp_CMOS_proj2_RTL.eda.qmsg
..............\..\prev_cmp_CMOS_proj2_RTL.fit.qmsg
..............\..\prev_cmp_CMOS_proj2_RTL.map.qmsg
..............\..\prev_cmp_CMOS_proj2_RTL.qmsg
..............\..\prev_cmp_CMOS_proj2_RTL.tan.qmsg
..............\..\sign_div_unsign_7kh.tdf
..............\..\sign_div_unsign_bkh.tdf
..............\incremental_db
..............\..............\compiled_partitions
..............\..............\...................\CMOS_proj2_RTL.root_partition.cmp.atm
..............\..............\...................\CMOS_proj2_RTL.root_partition.cmp.dfp
..............\..............\...................\CMOS_proj2_RTL.root_partition.cmp.

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