pci interface chip with PPGA program code using Quartus can open, using schematic design

CH365-CPLD
..........\CH365.asm.rpt
..........\CH365.done
..........\CH365.dpf
..........\CH365.fit.rpt
..........\CH365.fit.smsg
..........\CH365.fit.summary
..........\CH365.flow.rpt
..........\CH365.map.rpt
..........\CH365.map.summary
..........\CH365.pin
..........\CH365.pof
..........\CH365.qpf
..........\CH365.qsf
..........\CH365.qws
..........\CH365.tan.rpt
..........\CH365.tan.summary
..........\CH365_assignment_defaults.qdf
..........\db
..........\..\CH365.db_info
..........\..\CH365.eco.cdb
..........\..\CH365.sld_design_entry.sci
..........\..\rom0_ram_sim_870cf15.hdl.mif
..........\lpm_bustri0.bsf
..........\lpm_bustri0.cmp
..........\lpm_bustri0.vhd
..........\ram_sim.bsf
..........\ram_sim.vhd
..........\top.bdf

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