Based on the experimental demonstration of VGA and FPGA vhdl source code

VGA\output_file.jic
...\output_file.map
...\VGA.asm.rpt
...\VGA.cdf
...\VGA.done
...\VGA.dpf
...\VGA.eda.rpt
...\VGA.epe.rpt
...\VGA.epe.summary
...\VGA.fit.eqn
...\VGA.fit.rpt
...\VGA.fit.smsg
...\VGA.fit.summary
...\VGA.flow.rpt
...\VGA.map.eqn
...\VGA.map.rpt
...\VGA.map.summary
...\VGA.pin
...\VGA.pof
...\VGA.qpf
...\VGA.qsf
...\VGA.qws
...\VGA.sof
...\VGA.sta.rpt
...\VGA.sta.summary
...\VGA.tan.rpt
...\VGA.tan.summary
...\VGA.tcl
...\VGA.vhd
...\VGA.vhd.bak
...\VGA_assignment_defaults.qdf
...\VGA_early_pwr.csv
...\VGA_nativelink_simulation.rpt
...\simulation\modelsim\msim_transcript
...\..........\........\VGA.sft
...\..........\........\VGA.vo
...\..........\........\VGA.vt
...\..........\........\VGA.vt.bak
...\..........\........\VGA_8_1200mv_0c_slow.vo
...\..........\........\VGA_8_1200mv_0c_v_slow.sdo
...\..........\........\VGA_8_1200mv_85c_slow.vo
...\..........\........\VGA_8_1200mv_85c_v_slow.sdo
...\..........\........\VGA_fast.vo
...\..........\........\VGA_min_1200mv_0c_fast.vo
...\..........\........\VGA_min_1200mv_0c_v_fast.sdo
...\..........\........\VGA_modelsim.xrf
...\..........\........\VGA_run_msim_rtl_vhdl.do
...\..........\........\VGA_run_msim_rtl_vhdl.do.bak
...\..........\........\VGA_v.sdo
...\..........\........\VGA_v_fast.sdo
...\..........\........\rtl_work\_info
...\..........\........\........\_vmake
...\..........\........\........\.temp\vlog390qsc
...\..........\........\........\vga\behavioral.dat
...\..........\........\........\...\behavioral.dbs
...\..........\........\........\...\behavioral.prw
...\..........\........\........\...\behavioral.psm
...\..........\........\........\...\_primary.dat
...\..........\........\........\...\_primary.dbs
...\incremental_db\README
...\..............\compiled_partitions\VGA.root_partition.cmp.dfp
...\..............\...................\VGA.root_partition.cmp.kpt
...\..............\...................\VGA.root_partition.cmp.logdb
...\..............\...................\VGA.root_partition.map.dpi
...\..............\...................\VGA.root_partition.map.kpt
...\..............\...................\VGA.db_info
...\db\logic_util_heursitic.dat
...\..\prev_cmp_VGA.asm.qmsg
...\..\prev_cmp_VGA.fit.qmsg
...\..\prev_cmp_VGA.map.qmsg
...\..\prev_cmp_VGA.qmsg
...\..\prev_cmp_VGA.sta.qmsg
...\..\VGA_global_asgn_op.abo
...\..\VGA.db_info
...\simulation\modelsim\rtl_work\_temp
...\..........\........\........\vga
...\..........\........\rtl_work
...\..........\modelsim
...\incremental_db\compiled_partitions
...\simulation
...\incremental_db
...\db
VGA

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