Abstract—Power is becoming a precious resource in modern VLSI design, even more so than area. This paper proposes a novel architecture for modular, scalable &reusable hybrid constant co-efficient multiplier (KCM) circuit. Comparison is made between of kcm and multiplier. The implementation results show a significant improvement in performance in terms of area, power & timing. In This paper, we propose to design an 8-point FFT using kcm instead of complex multiplier and multiplier. Here our goal is to implement Radix-2 8-point FFT in hardware using hardware language (verilog) here time constraint is measured with the help of Xilinx FPGA (Field Programmable Gate Array).

latch\adder.v
.....\ashish_wav.do
.....\bahu
.....\....\_info
.....\....\_lib.qdb
.....\....\_lib1_12.qdb
.....\....\_lib1_12.qpg
.....\....\_lib1_13.qdb
.....\....\_lib1_13.qpg
.....\....\_lib1_5.qdb
.....\....\_lib1_5.qpg
.....\....\_lib1_8.qdb
.....\....\_lib1_8.qpg
.....\....\_lib1_9.qdb
.....\....\_lib1_9.qpg
.....\....\_vmake
.....\latch.v
.....\latch_shift1.v
.....\mux.v
.....\mux.v.bak
.....\shift1.v
.....\spec_delay.v
.....\top.v
.....\top.v.bak
.....\vsim.wlf
.....\wlft2tbxqg
.....\wlft92eyab
.....\wlftq0v15a
.....\xor.v

• We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please Google on your own.
• The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please contact us.
• Please use Winrar for decompression tools
• If download fail, Try it againg or Feedback to us.
• If downloaded content did not match the introduction, Feedback to us，Confirm and will be refund.
• Before downloading, you can inquire through the uploaded person information

Nothing．