This achieved by an 8-bit and 16-bit cpu VHDL code, although only a relatively small instruction support more than 20, but for learning routing architecture CPU helpful

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........\cpu_16
........\......\asm
........\......\...\mydef1.def
........\......\...\print.asm
........\......\...\print.lst
........\......\...\print.s19
........\......\...\test.asm
........\......\...\test.lst
........\......\...\test.s19
........\......\cpu16
........\......\.....\alu1.cel
........\......\.....\alu1.ucf
........\......\.....\alu1.ucf.untf
........\......\.....\automake.log
........\......\.....\bitgen.ut
........\......\.....\cpu.ana
........\......\.....\cpu.bgn
........\......\.....\cpu.bit
........\......\.....\cpu.bld
........\......\.....\cpu.cmd_log
........\......\.....\cpu.dly
........\......\.....\cpu.drc
........\......\.....\cpu.jhd
........\......\.....\cpu.mrp
........\......\.....\cpu.nc1
........\......\.....\cpu.ncd
........\......\.....\cpu.ngc
........\......\.....\cpu.ngd
........\......\.....\cpu.ngm
........\......\.....\cpu.ngr
........\......\.....\cpu.pad
........\......\.....\cpu.par
........\......\.....\cpu.pcf
........\......\.....\cpu.prj
........\......\.....\cpu.sprj
........\......\.....\cpu.stx
........\......\.....\cpu.syr
........\......\.....\cpu.twr
........\......\.....\cpu.twx
........\......\.....\cpu.ut
........\......\.....\cpu.vhd
........\......\.....\cpu.xpi
........\......\.....\cpu16.npl
........\......\.....\cpu16.ptf
........\......\.....\cpu_last_par.ncd
........\......\.....\cpu_map.ncd
........\......\.....\cpu_map.ngm
........\......\.....\cpu_ngdbuild.nav
........\......\.....\userlang.tpl
........\......\.....\xst
........\......\.....\...\work
........\......\.....\...\....\hdpdeps.ref
........\......\.....\...\....\sub00
........\......\.....\...\....\.....\vhpl00.vho
........\......\.....\...\....\.....\vhpl01.vho
........\......\.....\...\....\vhdllib.ref
........\......\.....\_impact.cmd
........\......\.....\_impact.log
........\......\.....\_ngo
........\......\.....\....\netlist.lst
........\......\.....\__projnav
........\......\.....\__projnav.log
........\......\.....\.........\bitgen.rsp
........\......\.....\.........\cpu.xst
........\......\.....\.........\cpu._prj
........\......\.....\.........\cpu._sprj
........\......\.....\.........\cpu16.gfl
........\......\.....\.........\cpu16_flowplus.gfl
........\......\.....\.........\cpu_jhdparse_tcl.rsp
........\......\.....\.........\cpu_ncdTOut_tcl.rsp
........\......\.....\.........\ednTOngd_tcl.rsp
........\......\.....\.........\map.log
........\......\.....\.........\nc1TOncd_tcl.rsp
........\......\.....\.........\par.log
........\......\.....\.........\posttrc.log
........\......\.....\.........\runXst_tcl.rsp
........\......\test.cfg
........\......\指令清单.xls
........\cpu_8
........\.....\asm
........\.....\...\myasm2.asm
........\.....\...\myasm2.lst
........\.....\...\myasm2.s19
........\.....\...\myasm3.asm
........\.....\...\myasm3.lst
........\.....\...\myasm3.s19
........\.....\...\mydef1.def
........\.....\cpu8
........\.....\....\.untf
........\.....\....\automake.log
........\.....\....\bitgen.ut
........\.....\....\cpu.ana
........\.....\....\cpu.bgn
........\.....\....\cpu.bit
........\.....\....\cpu.bld
........\.....\....\cpu.cmd_log
........\.....\....\cpu.dly
........\.....\....\cpu.drc
........\.....\....\cpu.jhd

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