Gigabit Ethernet, ALTERA company D3 board network communications, PC control board level digital tube LED/LCD screen display (GMII)

DE3_NET_150_GMII_NET0_9.1\.sopc_builder\filters.xml
.........................\.............\install.ptf
.........................\.............\install2.ptf
.........................\.............\preferences.xml
.........................\altmemddr.html
.........................\altmemddr.qip
.........................\altmemddr.v
.........................\altmemddr_advisor.ipa
.........................\altmemddr_auk_ddr_hp_controller_wrapper.v
.........................\altmemddr_controller_phy.v
.........................\altmemddr_example_driver.v
.........................\altmemddr_example_top.sdc
.........................\altmemddr_example_top.v
.........................\altmemddr_example_top.v.tmp2
.........................\altmemddr_example_top_1.v
.........................\altmemddr_example_top_10.v
.........................\altmemddr_example_top_11.v
.........................\altmemddr_example_top_12.v
.........................\altmemddr_example_top_2.v
.........................\altmemddr_example_top_3.v
.........................\altmemddr_example_top_4.v
.........................\altmemddr_example_top_5.v
.........................\altmemddr_example_top_6.v
.........................\altmemddr_example_top_7.v
.........................\altmemddr_example_top_8.v
.........................\altmemddr_example_top_9.v
.........................\altmemddr_ex_lfsr8.v
.........................\altmemddr_phy.html
.........................\altmemddr_phy.qip
.........................\altmemddr_phy.v
.........................\altmemddr_phy_alt_mem_phy.v
.........................\altmemddr_phy_alt_mem_phy_pll.qip
.........................\altmemddr_phy_alt_mem_phy_pll.v
.........................\altmemddr_phy_alt_mem_phy_pll_bb.v
.........................\altmemddr_phy_alt_mem_phy_seq.vhd
.........................\altmemddr_phy_alt_mem_phy_seq_wrapper.v
.........................\altmemddr_phy_autodetectedpins.tcl
.........................\altmemddr_phy_ddr_pins.tcl
.........................\altmemddr_phy_ddr_timing.sdc
.........................\altmemddr_phy_ddr_timing.tcl
.........................\altmemddr_phy_report_timing.tcl
.........................\altmemddr_phy_report_timing_core.tcl
.........................\altmemddr_phy_summary.csv
.........................\altmemddr_pin_assignments.tcl
.........................\......phy-library\auk_ddr_hp_controller.ocp
.........................\altpllpll.qip
.........................\altpllpll.v
.........................\altpllpll_bb.v
.........................\altpllpll_wave0.jpg
.........................\altpllpll_waveforms.html
.........................\alt_mem_phy_defines.v
.........................\auk_ddr_hp_controller.ocp
.........................\auk_ddr_hp_controller.vhd
.........................\clock_crossing_bridge.v
.........................\cpu.ocp
.........................\cpu.sdc
.........................\cpu.v
.........................\cpu_bht_ram.mif
.........................\cpu_dc_tag_ram.mif
.........................\cpu_ic_tag_ram.mif
.........................\cpu_jtag_debug_module_sysclk.v
.........................\cpu_jtag_debug_module_tck.v
.........................\cpu_jtag_debug_module_wrapper.v
.........................\cpu_mult_cell.v
.........................\cpu_ociram_default_contents.mif
.........................\cpu_oci_test_bench.v
.........................\cpu_rf_ram_a.mif
.........................\cpu_rf_ram_b.mif
.........................\cpu_test_bench.v
.........................\db\DE3_NET_DDR2.db_info
.........................\ddr2_clock_bridge.v
.........................\.....high_performance_controller-library\auk_ddr_hp_controller.ocp
.........................\ddr2_i2c_scl.v
.........................\ddr2_i2c_sda.v
.........................\ddr_o.qip
.........................\ddr_o.v
.........................\ddr_o_bb.v
.........................\DE3_NET_DDR2.pin
.........................\DE3_NET_DDR2.qpf
.........................\DE3_NET_DDR2.qsf
.........................\DE3_NET_DDR2.qws
.........................\DE3_NET_DDR2.sdc
......

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