The code for the second version is shown below. The synthesis report indicates that this uses 4 flip flops and 11 LUTs of various types. The maximum estimated clock frequency is 200 MHz. These results are consistent with the observations made in the original problem. The first version is faster, uses more flip flops, but requires relatively little logic.

TOFED_TB.zip
TOFED_Dataflow.zip
project1.cr.zip
TOFED_Stru.zip
projectaq1.cr.zip

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