Choose an encoder FPGA-based hardware with VHdl language of bis.

mux21a
......\.sopc_builder
......\.............\filters.xml
......\db
......\..\logic_util_heursitic.dat
......\..\mux21a.db_info
......\..\mux21a.eco.cdb
......\..\mux21a.map.qmsg
......\..\mux21a.sim.cvwf
......\..\mux21a.sld_design_entry.sci
......\..\prev_cmp_mux21a.asm.qmsg
......\..\prev_cmp_mux21a.fit.qmsg
......\..\prev_cmp_mux21a.map.qmsg
......\..\prev_cmp_mux21a.qmsg
......\..\prev_cmp_mux21a.sim.qmsg
......\..\prev_cmp_mux21a.tan.qmsg
......\..\wed.wsf
......\incremental_db
......\..............\README
......\..............\compiled_partitions
......\..............\...................\mux21a.root_partition.cmp.dfp
......\..............\...................\mux21a.root_partition.cmp.kpt
......\..............\...................\mux21a.root_partition.cmp.logdb
......\..............\...................\mux21a.root_partition.map.dpi
......\..............\...................\mux21a.root_partition.map.kpt
......\mux21a.asm.rpt
......\mux21a.bsf
......\mux21a.done
......\mux21a.dpf
......\mux21a.fit.rpt
......\mux21a.fit.smsg
......\mux21a.fit.summary
......\mux21a.flow.rpt
......\mux21a.map.rpt
......\mux21a.map.summary
......\mux21a.pin
......\mux21a.pof
......\mux21a.qpf
......\mux21a.qsf
......\mux21a.qws
......\mux21a.sim.rpt
......\mux21a.sof
......\mux21a.tan.rpt
......\mux21a.tan.summary
......\mux21a.vhd
......\mux21a.vhd.bak
......\mux21a.vwf
......\sopc_builder_log.txt

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