CY7C68013A transmission source, including input and output of two parts

CY7C68013A\clk_div.v
..........\CY7C68013A.gise
..........\CY7C68013A.xise
..........\ipcore_dir\coregen.cgp
..........\..........\coregen.log
..........\..........\create_FIFO.tcl
..........\..........\edit_FIFO.tcl
..........\..........\FIFO.asy
..........\..........\FIFO.gise
..........\..........\FIFO.ncf
..........\..........\FIFO.ngc
..........\..........\FIFO.sym
..........\..........\FIFO.v
..........\..........\FIFO.veo
..........\..........\FIFO.xco
..........\..........\FIFO.xise
..........\..........\FIFO_flist.txt
..........\..........\fifo_generator_ug175.pdf
..........\..........\fifo_generator_v8_3_readme.txt
..........\..........\FIFO_ste\example_design\FIFO_top.ucf
..........\..........\........\..............\FIFO_top.vhd
..........\..........\........\..............\FIFO_top.xdc
..........\..........\........\implement\implement.bat
..........\..........\........\.........\implement.sh
..........\..........\........\.........\planAhead_rdn.bat
..........\..........\........\.........\planAhead_rdn.sh
..........\..........\........\.........\planAhead_rdn.tcl
..........\..........\........\.........\xst.prj
..........\..........\........\.........\xst.scr
..........\..........\FIFO_xmdf.tcl
..........\..........\tmp\_cg\_dbg\xil_834.in
..........\..........\...\...\....\xil_834.out
..........\..........\...\.xmsgs\ngcbuild.xmsgs
..........\..........\...\......\pn_parser.xmsgs
..........\..........\...\......\xst.xmsgs
..........\..........\_xmsgs\cg.xmsgs
..........\..........\......\pn_parser.xmsgs
..........\.seconfig\CY7C68013A.projectmgr
..........\.........\USB_top.xreport
..........\rx_engine.v
..........\tx_engine.v
..........\USB_top.cmd_log
..........\USB_top.lso
..........\USB_top.prj
..........\USB_top.syr
..........\USB_top.v
..........\USB_top.xst
..........\USB_top_envsettings.html
..........\USB_top_summary.html
..........\USB_top_xst.xrpt
..........\usb_trx.v
..........\webtalk_pn.xml
..........\xst\work\hdllib.ref
..........\...\....\vlg17\usb__trx.bin
..........\...\....\...20\_u_s_b__top.bin
..........\...\....\....F\rx__engine.bin
..........\...\....\...3C\clk__div.bin
..........\...\....\...71\tx__engine.bin
..........\...\....\....C\_f_i_f_o.bin
..........\_xmsgs\pn_parser.xmsgs
..........\......\xst.xmsgs
..........\xst\dump.xst\USB_top.prj\ngx\notopt
..........\...\........\...........\...\opt
..........\ipcore_dir\tmp\_cg\_dbg
..........\xst\dump.xst\USB_top.prj\ngx
..........\ipcore_dir\FIFO_ste\example_design
..........\..........\........\implement
..........\..........\tmp\xlnx_auto_0_xdb
..........\..........\...\_cg
..........\..........\...\_xmsgs
..........\xst\dump.xst\USB_top.prj
..........\...\work\vlg17
..........\...\....\vlg20
..........\...\....\vlg2F
..........\...\....\vlg3C
..........\...\....\vlg71
..........\...\....\vlg7C
..........\ipcore_dir\FIFO_ste
..........\..........\tmp
..........\..........\_xmsgs
..........\xst\dump.xst
..........\...\projnav.tmp
..........\...\work
..........\ipcore_dir
..........\iseconfig
..........\xst
..........\_xmsgs
CY7C68013A

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