FPGA design [Tian Yun eds] [source code]

FPGA设计[田耘等编著][程序源代码]
................................\Verilog代码
................................\...........\c10
................................\...........\...\10-2
................................\...........\...\....\mult.xco
................................\...........\...\....\mydds.xco
................................\...........\...\....\square_syn.v
................................\...........\...\10-4
................................\...........\...\....\coastas_dds.v
................................\...........\...\....\costas_lf.v
................................\...........\...\....\costas_loop.v
................................\...........\...\....\costas_lpf.v
................................\...........\...\....\costas_mult.v
................................\...........\...\....\err_mult.v
................................\...........\...\....\fir_lpf.xco
................................\...........\...\....\mult.xco
................................\...........\...\....\my_dds.xco
................................\...........\...\10-6
................................\...........\...\....\de_mult.xco
................................\...........\...\....\dearly_sub.v
................................\...........\...\....\dedds.v
................................\...........\...\....\delay_early_gate.v
................................\...........\...\....\eddds.xco
................................\...........\...\....\iir.v
................................\...........\...\....\iir1.v
................................\...........\...\10-8
................................\...........\...\....\baker.v
................................\...........\c11
................................\...........\...\11-10
................................\...........\...\.....\div16.xco
................................\...........\...\.....\fir_rls.v
................................\...........\...\.....\rlsmult.xco
................................\...........\...\.....\shiftreg25.xco
................................\...........\...\.....\shiftreg28.xco
................................\...........\...\.....\shiftreg3.xco
................................\...........\...\11-12
................................\...........\...\.....\dfe_filter.v
................................\...........\...\.....\dfe_mult.xco
................................\...........\...\11-14
................................\...........\...\.....\aa_adder.xco
................................\...........\...\.....\aa_bram.xco
................................\...........\...\.....\aa_cmult.xco
................................\...........\...\.....\ad_a.v
................................\...........\...\.....\shift16.xco
................................\...........\...\11-2
................................\...........\...\....\fir_lms.v
................................\...........\...\11-3
................................\...........\...\....\fir_pipline_lms.v
................................\...........\...\....\lmsmult.xco
................................\...........\...\11-5
................................\...........\...\....\mult.xco
................................\...........\...\....\shiftreg4.xco
................................\...........\...\....\sign_fir_lms.v
................................\...........\...\11-8
................................\...........\...\....\blockconnect.v
................................\...........\...\....\cmult.v
................................\...........\...\....\coe_updata.v
................................\...........\...\....\complex_mult.xco
................................\...........\...\....\fft_block.v
................................\...........\...\....\fft_block_lms.v
................................\...........\...\....\fft_w16_p32.xco
................................\...........\...\....\gonge.v
................................\...........\...\....\ifft_block.v
................................\...........\...\....\insert.v
................................\...........\...\....\save_sub.v
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