CY7C68013 achieve high-speed transmission SLAVE_FIFO 40M/s, including FPGA program and FX2LP program

fpga\ADC_Controller.vhd
....\CLKGen.vhd
....\Controller.vhd
....\Controller.vhd.bak
....\FIFO_8Bit_2K.vhd
....\FIFO_Core.cmp
....\FIFO_Core.qip
....\FIFO_Core.vhd
....\FIFO_Core_wave0.jpg
....\FIFO_Core_wave1.jpg
....\FIFO_Core_waveforms.html
....\PLL_Core.bsf
....\PLL_Core.cmp
....\PLL_Core.ppf
....\PLL_Core.qip
....\PLL_Core.vhd
....\SDRAM_Controller.vhd
....\SDRAM_Controller.vhd.bak
....\stp1.stp
....\USB2_SDRAM_Project.asm.rpt
....\USB2_SDRAM_Project.cdf
....\USB2_SDRAM_Project.done
....\USB2_SDRAM_Project.fit.rpt
....\USB2_SDRAM_Project.fit.smsg
....\USB2_SDRAM_Project.fit.summary
....\USB2_SDRAM_Project.flow.rpt
....\USB2_SDRAM_Project.jdi
....\USB2_SDRAM_Project.map.rpt
....\USB2_SDRAM_Project.map.summary
....\USB2_SDRAM_Project.merge.rpt
....\USB2_SDRAM_Project.pin
....\USB2_SDRAM_Project.pof
....\USB2_SDRAM_Project.qpf
....\USB2_SDRAM_Project.qsf
....\USB2_SDRAM_Project.qws
....\USB2_SDRAM_Project.sof
....\USB2_SDRAM_Project.sta.rpt
....\USB2_SDRAM_Project.sta.summary
....\USB2_SDRAM_Project.tan.rpt
....\USB2_SDRAM_Project.tan.summary
....\USB2_SDRAM_Project.vhd
....\USB2_SDRAM_Project.vhd.bak
....\USB2_SDRAM_Project_assignment_defaults.qdf
....\incremental_db\README
....\..............\compiled_partitions\USB2_SDRAM_Project.autoh_e4eb1.map.dpi
....\..............\...................\USB2_SDRAM_Project.autoh_e4eb1.map.kpt
....\..............\...................\USB2_SDRAM_Project.autoh_e4eb1.map.logdb
....\..............\...................\USB2_SDRAM_Project.autoh_e4eb58185d954d358c52b26e0df67201.map.dpi
....\..............\...................\USB2_SDRAM_Project.autoh_e4eb58185d954d358c52b26e0df67201.map.kpt
....\..............\...................\USB2_SDRAM_Project.autoh_e4eb58185d954d358c52b26e0df67201.map.logdb
....\..............\...................\USB2_SDRAM_Project.autos_3e921.map.dpi
....\..............\...................\USB2_SDRAM_Project.autos_3e921.map.kpt
....\..............\...................\USB2_SDRAM_Project.autos_3e921.map.logdb
....\..............\...................\USB2_SDRAM_Project.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.dpi
....\..............\...................\USB2_SDRAM_Project.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.kpt
....\..............\...................\USB2_SDRAM_Project.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.logdb
....\..............\...................\USB2_SDRAM_Project.db_info
....\..............\...................\USB2_SDRAM_Project.root_partition.cmp.cdb
....\..............\...................\USB2_SDRAM_Project.root_partition.cmp.dfp
....\..............\...................\USB2_SDRAM_Project.root_partition.cmp.hdb
....\..............\...................\USB2_SDRAM_Project.root_partition.cmp.kpt
....\..............\...................\USB2_SDRAM_Project.root_partition.cmp.logdb
....\..............\...................\USB2_SDRAM_Project.root_partition.cmp.rcfdb
....\..............\...................\USB2_SDRAM_Project.root_partition.map.cdb
....\..............\...................\USB2_SDRAM_Project.root_partition.map.dpi
....\..............\...................\USB2_SDRAM_Project.root_partition.map.hbdb.cdb
....\..............\...................\USB2_SDRAM_Project.root_partition.map.hbdb.hb_info
....\..............\...................\USB2_SDRAM_Project.root_partition.map.hbdb.hdb
....\..............\...................\USB2_SDRAM_Project.root_partition.map.hbdb.sig
....\..............\...................\USB2_SDRAM_Project.root_partition.map.hdb
....\..............\...................\USB2_SDRAM_Project.root_partition.map.kpt
....\..............\...................\USB2_SDRAM_Project.root_partition.merge_hb.atm
....\greybox_tmp\cbx_args.txt
FX2LP\dscr.a51
.....\DSCR.LST
.....\DSCR.OBJ
.....\EZUSB.LIB
.....\fw.c
.....\FW.LST
.....\FW.OBJ
.....\Fx2.h
.....\fx2regs.h
.....\fx2sdly.h
.....\readme.txt
.....\slave
.....\slave.c
.....\slave.hex
.....\slave.iic
.....\slave.lnp
.....\slave.LST
.....\slave.M51
.....\slave.OBJ
.....\slave.Opt
.....\slave.plg
.....\slave.Uv2
.....\slave_Opt.Bak
.....\slave_Uv2.Bak
.....\syncdly.h
.....\USBJmpTb.OBJ
fpga\increme

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