Introduction - If you have any usage issues, please Google them yourself
The information contained in this draft manual represents the definition of the Verilog hardware description language as it existed at the time Cadence Design Systems, Inc. transferred the language and its documentation to Open Verilog International (OVI). This manual does not contain any language changes or additions developed or approved by OVI. This information constitutes the basis which OVI may make refinements and/or additions to the language