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usb3.0_ddr_ext

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  • Update : 2015-12-17
  • Size : 5.15mb
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Introduction - If you have any usage issues, please Google them yourself
cyusb3014 usb3.0 Development
Packet file list
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ep3c16_usb_ddr2_ext\altera_avalon_half_rate_bridge.v
...................\altera_avalon_half_rate_bridge_constraints.sdc
...................\...memphy-library\auk_ddr_hp_controller.ocp
...................\alt_ddrx_addr_cmd.v
...................\alt_ddrx_afi_block.v
...................\alt_ddrx_avalon_if.v
...................\alt_ddrx_bank_tracking.v
...................\alt_ddrx_clock_and_reset.v
...................\alt_ddrx_cmd_queue.v
...................\alt_ddrx_controller.v
...................\alt_ddrx_csr.v
...................\alt_ddrx_ddr2_odt_gen.v
...................\alt_ddrx_ddr3_odt_gen.v
...................\alt_ddrx_decoder.v
...................\alt_ddrx_decoder_40.v
...................\alt_ddrx_decoder_72.v
...................\alt_ddrx_ecc.v
...................\alt_ddrx_encoder.v
...................\alt_ddrx_encoder_40.v
...................\alt_ddrx_encoder_72.v
...................\alt_ddrx_input_if.v
...................\alt_ddrx_odt_gen.v
...................\alt_ddrx_state_machine.v
...................\alt_ddrx_timers.v
...................\alt_ddrx_timers_fsm.v
...................\alt_ddrx_wdata_fifo.v
...................\alt_mem_phy_defines.v
...................\auk_ddr_hp_controller.ocp
...................\auk_ddr_hp_controller.vhd
...................\ddr2a.bsf
...................\ddr2a.cmp
...................\ddr2a.html
...................\ddr2a.ppf
...................\ddr2a.qip
...................\ddr2a.vhd
...................\ddr2a_advisor.ipa
...................\ddr2a_alt_ddrx_controller_wrapper.v
...................\ddr2a_auk_ddr_hp_controller_wrapper.v
...................\ddr2a_controller_phy.vhd
...................\ddr2a_example_driver.vhd
...................\ddr2a_example_top.sdc
...................\ddr2a_example_top.vhd
...................\ddr2a_example_top.vhd.tmp2
...................\ddr2a_example_top_1.vhd
...................\ddr2a_example_top_2.vhd
...................\ddr2a_ex_lfsr8.vhd
...................\ddr2a_phy.bsf
...................\ddr2a_phy.cmp
...................\ddr2a_phy.html
...................\ddr2a_phy.qip
...................\ddr2a_phy.vhd
...................\ddr2a_phy_alt_mem_phy.v
...................\ddr2a_phy_alt_mem_phy_pll.cmp
...................\ddr2a_phy_alt_mem_phy_pll.qip
...................\ddr2a_phy_alt_mem_phy_pll.vhd
...................\ddr2a_phy_alt_mem_phy_pll.vhd_.bak
...................\ddr2a_phy_alt_mem_phy_seq.vhd
...................\ddr2a_phy_alt_mem_phy_seq_wrapper.v
...................\ddr2a_phy_autodetectedpins.tcl
...................\ddr2a_phy_ddr_pins.tcl
...................\ddr2a_phy_ddr_timing.sdc
...................\ddr2a_phy_report_timing.tcl
...................\ddr2a_phy_summary.csv
...................\ddr2a_pin_assignments.tcl
...................\ddr2_fifo.stp
...................\.....high_performance_controller-library\auk_ddr_hp_controller.ocp
...................\ExtCtrl.vhd
...................\fpga.asm.rpt
...................\fpga.bdf
...................\fpga.cdf
...................\fpga.done
...................\fpga.dpf
...................\fpga.fit.rpt
...................\fpga.fit.smsg
...................\fpga.fit.summary
...................\fpga.flow.rpt
...................\fpga.jdi
...................\fpga.map.rpt
...................\fpga.map.smsg
...................\fpga.map.summary
...................\fpga.pin
...................\fpga.qpf
...................\fpga.qsf
...................\fpga.sim.rpt
...................\fpga.sof
...................\fpga.sta.rpt
...................\fpga.sta.summary
...................\fpga.tcl
...................\fpga_usb_ext.tcl.bak
...................\hnr_pll.bsf
...................\hnr_pll.cmp
...................\hnr_pll.ppf
...................\hnr_pll.qip
...................\hnr_pll.vhd
...................\huanor_dcfifo.vhd
...................\huanor_dcfifo.vhd.bak
...................\huanor_dcfifo_sah.vhd
...................\huanor_ddr2_fifo.vhd
...................\huanor_ddr2_fifo.vhd.bak
...................\huanor_key.bsf
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