program for graphing letters on a screen using a FPGA through VHDL

VGA-Final\.lso
.........\generacioncaracteres.prj
.........\generacioncaracteres.stx
.........\generacioncaracteres.vhd
.........\generacioncaracteres.xst
.........\generacioncaracteres_vhdl.prj
.........\iseconfig\Proyfinal_Top.xreport
.........\.........\sincronizacion.xreport
.........\.........\VGA-Final.projectmgr
.........\LCD.prj
.........\LCD.stx
.........\LCD.vhd
.........\LCD.xst
.........\LCD1602.prj
.........\LCD1602.stx
.........\LCD1602.xst
.........\LCD1602_vhdl.prj
.........\LCD_vhdl.prj
.........\pa.fromNetlist.tcl
.........\planAhead.ngc2edif.log
.........\........._run_1\planAhead.jou
.........\...............\planAhead.log
.........\...............\planAhead_run.log
.........\...............\VGA-Final.data\cache\Proyfinal_Top_ngc_78a4c059.edif
.........\...............\..............\.onstrs_1\fileset.xml
.........\...............\..............\runs\impl_1.psg
.........\...............\..............\....\runs.xml
.........\...............\..............\sources_1\fileset.xml
.........\...............\..............\wt\project.wpc
.........\...............\..............\..\webtalk_pa.xml
.........\...............\VGA-Final.ppr
.........\proyfinal_top.bgn
.........\proyfinal_top.bit
.........\Proyfinal_Top.bld
.........\Proyfinal_Top.cmd_log
.........\proyfinal_top.drc
.........\Proyfinal_Top.lso
.........\Proyfinal_Top.ncd
.........\Proyfinal_Top.ngc
.........\Proyfinal_Top.ngd
.........\Proyfinal_Top.ngr
.........\Proyfinal_Top.pad
.........\Proyfinal_Top.par
.........\Proyfinal_Top.pcf
.........\Proyfinal_Top.prj
.........\Proyfinal_Top.ptwx
.........\Proyfinal_Top.stx
.........\Proyfinal_Top.syr
.........\Proyfinal_Top.twr
.........\Proyfinal_Top.twx
.........\Proyfinal_Top.ucf
.........\Proyfinal_Top.unroutes
.........\Proyfinal_Top.ut
.........\Proyfinal_Top.vhd
.........\Proyfinal_Top.xpi
.........\Proyfinal_Top.xst
.........\Proyfinal_Top_bitgen.xwbt
.........\Proyfinal_Top_envsettings.html
.........\Proyfinal_Top_guide.ncd
.........\Proyfinal_Top_map.map
.........\Proyfinal_Top_map.mrp
.........\Proyfinal_Top_map.ncd
.........\Proyfinal_Top_map.ngm
.........\Proyfinal_Top_map.xrpt
.........\Proyfinal_Top_ngdbuild.xrpt
.........\Proyfinal_Top_pad.csv
.........\Proyfinal_Top_pad.txt
.........\Proyfinal_Top_par.xrpt
.........\Proyfinal_Top_summary.html
.........\Proyfinal_Top_summary.xml
.........\Proyfinal_Top_usage.xml
.........\Proyfinal_Top_vhdl.prj
.........\Proyfinal_Top_xst.xrpt
.........\sincronizacion.prj
.........\sincronizacion.stx
.........\sincronizacion.vhd
.........\sincronizacion.xst
.........\sincronizacion_summary.html
.........\sincronizacion_vhdl.prj
.........\Top_caracteres.prj
.........\Top_caracteres.stx
.........\Top_caracteres.vhd
.........\Top_caracteres.xst
.........\Top_caracteres_summary.html
.........\Top_caracteres_vhdl.prj
.........\usage_statistics_webtalk.html
.........\VGA-Final.gise
.........\VGA-Final.xise
.........\webtalk.log
.........\webtalk_pn.xml
.........\xlnx_auto_0_xdb\cst.xbcd
.........\.st\work\hdllib.ref
.........\...\....\hdpdeps.ref
.........\...\....\sub00\vhpl00.vho
.........\...\....\.....\vhpl01.vho
.........\...\....\.....\vhpl02.vho
.........\...\....\.....\vhpl03.vho
.........\...\....\.....\vhpl04.vho
.........\...\....\.....\vhpl05.vho
.........\...\....\.....\vhpl06.vho

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