cordic code based VHDL programming

kvcordic good\trunk\bench\vhdl\cordic_tb.vhd
.............\.....\doc\AUTHORS
.............\.....\...\CORDIC-EULA.txt
.............\.....\...\README
.............\.....\...\README.html
.............\.....\...\README.pdf
.............\.....\...\rst2docs.sh
.............\.....\...\VERSION
.............\.....\rtl\vhdl\cordic.vhd
.............\.....\...\....\cordic_cdt_pkg.vhd
.............\.....\sim\rtl_sim\bin\cordic.mk
.............\.....\...\.......\out\cordic_alg_test_results.txt
.............\.....\...\.......\run\cordic.sh
.............\.....\...\.......\...\cordic_test_data.txt
.............\.....\...\.......\vhdl\operpack.vhd
.............\.....\...\.......\....\std_logic_textio.vhd
.............\.....\.w\cordic-flp.txt
.............\.....\..\cordic.c
.............\.....\..\cordic.dot
.............\.....\..\cordic.dot.png
.............\.....\..\cordic.nac
.............\.....\.yn\xise\bin\xst.mk
.............\.....\...\....\log\cordic-xst14.6.txt
.............\.....\...\....\run\syn.sh
.............\.....\.im\rtl_sim\bin
.............\.....\...\.......\log
.............\.....\...\.......\out
.............\.....\...\.......\run
.............\.....\...\.......\src
.............\.....\...\.......\vhdl
.............\.....\.yn\xise\bin
.............\.....\...\....\log
.............\.....\...\....\out
.............\.....\...\....\run
.............\.....\...\....\src
.............\.....\bench\vhdl
.............\.....\rtl\vhdl
.............\.....\sim\rtl_sim
.............\.....\.yn\xise
.............\.....\bench
.............\.....\doc
.............\.....\rtl
.............\.....\sim
.............\.....\sw
.............\.....\syn
.............\branches
.............\tags
.............\trunk
kvcordic good

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