FPGA control LCD to display.

image1280-50M\cmp_state.ini
.............\cyclic.qpf
.............\cyclic.qws
.............\db
.............\..\cntr_gv7.tdf
.............\..\cntr_lj8.tdf
.............\..\cntr_sb7.tdf
.............\..\cntr_vk8.tdf
.............\..\image.asm.qmsg
.............\..\image.cbx.xml
.............\..\image.cmp.cdb
.............\..\image.cmp.hdb
.............\..\image.cmp.rdb
.............\..\image.cmp.tdb
.............\..\image.cmp0.ddb
.............\..\image.db_info
.............\..\image.eco.cdb
.............\..\image.fit.qmsg
.............\..\image.hier_info
.............\..\image.hif
.............\..\image.map.cdb
.............\..\image.map.hdb
.............\..\image.map.qmsg
.............\..\image.pre_map.cdb
.............\..\image.pre_map.hdb
.............\..\image.psp
.............\..\image.rtlv.hdb
.............\..\image.rtlv_sg.cdb
.............\..\image.rtlv_sg_swap.cdb
.............\..\image.sgdiff.cdb
.............\..\image.sgdiff.hdb
.............\..\image.signalprobe.cdb
.............\..\image.sld_design_entry.sci
.............\..\image.sld_design_entry_dsc.sci
.............\..\image.syn_hier_info
.............\..\image.tan.qmsg
.............\..\image_cmp.qrpt
.............\image.asm.rpt
.............\image.bsf
.............\image.done
.............\image.fit.eqn
.............\image.fit.rpt
.............\image.fit.summary
.............\image.flow.rpt
.............\image.map.eqn
.............\image.map.rpt
.............\image.map.summary
.............\image.pin
.............\image.pof
.............\image.ppl
.............\image.qsf
.............\image.sof
.............\image.tan.rpt
.............\image.tan.summary
.............\image.vhd
.............\image_assignment_defaults.qdf
.............\moving.vhd
.............\moving_object.vhd
.............\output_file.jic
.............\shinning.vhd

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