DDR2_sdram DDR2 controller, it is by the compiler-

DDR2_sdram

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Update : 2008-10-13
Size : 944.68kb
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DDR2 controller, it is by the compiler-generated LATTICE.

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Packet : 85375540ddr2_sdram.rar filelist
DDR2_sdram\ram_dp\RAM_DP.lpc
DDR2_sdram\ram_dp\RAM_DP.srp
DDR2_sdram\ram_dp\RAM_DP.v
DDR2_sdram\ram_dp\RAM_DP_tmpl.v
DDR2_sdram\ram_dp\tb_RAM_DP_tmpl.v
DDR2_sdram\ram_dp\RAM_DP.naf
DDR2_sdram\ram_dp\ram_dp.sym
DDR2_sdram\ram_dp\msg_file.log
DDR2_sdram\ram_dp\RAM_DP_generate.log
DDR2_sdram\ddr_p_eval\models\mem\ddr2.v
DDR2_sdram\ddr_p_eval\models\mem\ddr2_db_width_16.v
DDR2_sdram\ddr_p_eval\models\mem\ddr2_db_width_32.v
DDR2_sdram\ddr_p_eval\models\mem\ddr2_db_width_64.v
DDR2_sdram\ddr_p_eval\models\mem\ddr2_db_width_72.v
DDR2_sdram\ddr_p_eval\models\mem\ddr2_db_width_8.v
DDR2_sdram\ddr_p_eval\models\mem\ddr2_parameters.vh
DDR2_sdram\ddr_p_eval\models\ecp2m\ddr_data_io.v
DDR2_sdram\ddr_p_eval\models\ecp2m\ddr_dm_io.v
DDR2_sdram\ddr_p_eval\models\ecp2m\ddr_dqs_io.v
DDR2_sdram\ddr_p_eval\models\ecp2m\ddr_sdram_mem_io_top.v
DDR2_sdram\ddr_p_eval\models\ecp2m\kbar_clk_pll.v
DDR2_sdram\ddr_p_eval\models\ecp2m\pio_dvalid_gen.v
DDR2_sdram\ddr_p_eval\models\ecp2m\pmi_def.v
DDR2_sdram\ddr_p_eval\models\ecp2m\pmi_distributed_dpram.v
DDR2_sdram\ddr_p_eval\models\ecp2m\pll.v.bak
DDR2_sdram\ddr_p_eval\models\ecp2m\pll_266M.v
DDR2_sdram\ddr_p_eval\models\ecp2m\pll_120M.v
DDR2_sdram\ddr_p_eval\testbench\tests\ecp2m\cmd_gen.v
DDR2_sdram\ddr_p_eval\testbench\tests\ecp2m\testcase.v
DDR2_sdram\ddr_p_eval\testbench\tests\ecp2m\tb_config_params.v
DDR2_sdram\ddr_p_eval\testbench\top\ecp2m\monitor.v
DDR2_sdram\ddr_p_eval\testbench\top\ecp2m\odt_watchdog.v
DDR2_sdram\ddr_p_eval\testbench\top\ecp2m\test_mem_ctrl.v
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.sdc
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr2_eval.syn
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_params.v
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr2.ngo
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr2_eval_synplify.lpf
DDR2_sdram\ddr_p_eval\ddr2\impl\post_route_trace_synplify.prf
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr2_eval_precision.lpf
DDR2_sdram\ddr_p_eval\ddr2\impl\post_route_trace_precision.prf
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr2_eval.lpf
DDR2_sdram\ddr_p_eval\ddr2\impl\DDR2_eval.h
DDR2_sdram\ddr_p_eval\ddr2\impl\DDR2_eval.lci
DDR2_sdram\ddr_p_eval\ddr2\impl\DDR2_eval.lct
DDR2_sdram\ddr_p_eval\ddr2\impl\DDR2_eval.ini
DDR2_sdram\ddr_p_eval\ddr2\impl\automake.log
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_dqs_io.jhd
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_dqs_io.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\bidi_dqs.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr2_bb.jhd
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr2.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_io_top.jhd
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_io_top.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_data_io.jhd
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_data_io.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\bidi_cell.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.jhd
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\kbar_clk_pll.jhd
DDR2_sdram\ddr_p_eval\ddr2\impl\kbar_clk_pll.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_dm_io.jhd
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_dm_io.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr2_eval.jid
DDR2_sdram\ddr_p_eval\ddr2\impl\DDR2_eval.mt
DDR2_sdram\ddr_p_eval\ddr2\impl\DDR2_eval.pt
DDR2_sdram\ddr_p_eval\ddr2\impl\DDR2_eval.sty
DDR2_sdram\ddr_p_eval\ddr2\impl\DDR2_eval_tcl.ini
DDR2_sdram\ddr_p_eval\ddr2\impl\DDR2_eval.tcl
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr2_eval.rev
DDR2_sdram\ddr_p_eval\ddr2\impl\syndos.env
DDR2_sdram\ddr_p_eval\ddr2\impl\pll.sym
DDR2_sdram\ddr_p_eval\ddr2\impl\pll.lpc
DDR2_sdram\ddr_p_eval\ddr2\impl\pll.jhd
DDR2_sdram\ddr_p_eval\ddr2\impl\pll.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\syn\runsyn_ddr2_top.cmd
DDR2_sdram\ddr_p_eval\ddr2\impl\syn\ddr2_top.cmd
DDR2_sdram\ddr_p_eval\ddr2\impl\syn\ddr_sdram_mem_params.v
DDR2_sdram\ddr_p_eval\ddr2\impl\par\ddr2_eval.pt
DDR2_sdram\ddr_p_eval\ddr2\impl\par\ddr2_eval.p2t
DDR2_sdram\ddr_p_eval\ddr2\impl\par\ddr2_eval.p3t
DDR2_sdram\ddr_p_eval\ddr2\impl\par\runpar_ddr2_top.cmd
DDR2_sdram\ddr_p_eval\ddr2\impl\par\ddr2.ngo
DDR2_sdram\ddr_p_eval\ddr2\impl\par\ddr_sdram_mem_params.v
DDR2_sdram\ddr_p_eval\ddr2\impl\par\ddr_sdram_mem_top.sdc
DDR2_sdram\ddr_p_eval\ddr2\impl\par\ddr2_eval.lpf
DDR2_sdram\ddr_p_eval\ddr2\impl\par\post_route_trace_synplify.prf
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr2_eval.rvp
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.cmd
DDR2_sdram\ddr_p_eval\ddr2\impl\stdout.log
DDR2_sdram\ddr_p_eval\ddr2\impl\syntmp\ddr_sdram_mem_top.plg
DDR2_sdram\ddr_p_eval\ddr2\impl\syntmp\ddr_sdram_mem_top.msg
DDR2_sdram\ddr_p_eval\ddr2\impl\syntmp\RAM_DP.plg
DDR2_sdram\ddr_p_eval\ddr2\impl\syntmp\RAM_DP.msg
DDR2_sdram\ddr_p_eval\ddr2\impl\syntmp\pll_120M.plg
DDR2_sdram\ddr_p_eval\ddr2\impl\syntmp\pll_120M.msg
DDR2_sdram\ddr_p_eval\ddr2\impl\backup\ddr_sdram_mem_top.log
DDR2_sdram\ddr_p_eval\ddr2\impl\run_options.txt
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.szr
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.srd
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_266M.jhd
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_266M.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.log
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.tlg
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.srs
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.srm
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.edi
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.vm
DDR2_sdram\ddr_p_eval\ddr2\impl\ddr_sdram_mem_top.vhm
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.sym
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.lpc
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.jhd
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.cmd
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.log
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.tlg
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.srs
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.szr
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.srd
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.srm
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.edi
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.vm
DDR2_sdram\ddr_p_eval\ddr2\impl\RAM_DP.vhm
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.jhd
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.naf
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.cmd
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.log
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.tlg
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.srs
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.szr
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.srd
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.srm
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.edi
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.vm
DDR2_sdram\ddr_p_eval\ddr2\impl\pll_120M.vhm
DDR2_sdram\ddr_p_eval\ddr2\sim\modelsim\ddr2_eval.do
DDR2_sdram\ddr_p_eval\ddr2\sim\modelsim\ddr2_eval_timing.do
DDR2_sdram\ddr_p_eval\ddr2\src\params\ddr_sdram_mem_params.v
DDR2_sdram\ddr_p_eval\ddr2\src\rtl\top\ecp2m\ddr_sdram_mem_top.v
DDR2_sdram\ddr_p_eval\readme.htm
DDR2_sdram\ddr_p_eval\eval_sim_readme.txt
DDR2_sdram\ddr2.lpc
DDR2_sdram\ddr2_generate.log
DDR2_sdram\generate_core.tcl
DDR2_sdram\ddr2_gen.log
DDR2_sdram\ddr2_bb.v
DDR2_sdram\ddr2_inst.v
DDR2_sdram\ddr2_beh.v
DDR2_sdram\ddr2.cmd
DDR2_sdram\stdout.log
DDR2_sdram\key_out.txt
DDR2_sdram\ddr2.ngo
DDR2_sdram\ddr2_generate.tcl
DDR2_sdram\ddr2_filelist.log
DDR2_sdram\pll_266.667\pll.lpc
DDR2_sdram\pll_266.667\msg_file.log
DDR2_sdram\pll_266.667\pll.naf
DDR2_sdram\pll_266.667\pll.srp
DDR2_sdram\pll_266.667\pll.sym
DDR2_sdram\pll_266.667\pll.v
DDR2_sdram\pll_266.667\pll_generate.log
DDR2_sdram\pll_266.667\pll_tmpl.v
DDR2_sdram\ddr_p_eval\ddr2\src\rtl\top\ecp2m
DDR2_sdram\ddr_p_eval\ddr2\src\rtl\template\ecp2m
DDR2_sdram\ddr_p_eval\ddr2\src\rtl\top
DDR2_sdram\ddr_p_eval\ddr2\src\rtl\template
DDR2_sdram\ddr_p_eval\testbench\tests\ecp2m
DDR2_sdram\ddr_p_eval\testbench\top\ecp2m
DDR2_sdram\ddr_p_eval\ddr2\impl\syn
DDR2_sdram\ddr_p_eval\ddr2\impl\par
DDR2_sdram\ddr_p_eval\ddr2\impl\syntmp
DDR2_sdram\ddr_p_eval\ddr2\impl\backup
DDR2_sdram\ddr_p_eval\ddr2\sim\modelsim
DDR2_sdram\ddr_p_eval\ddr2\src\params
DDR2_sdram\ddr_p_eval\ddr2\src\rtl
DDR2_sdram\ddr_p_eval\models\mem
DDR2_sdram\ddr_p_eval\models\ecp2m
DDR2_sdram\ddr_p_eval\testbench\tests
DDR2_sdram\ddr_p_eval\testbench\top
DDR2_sdram\ddr_p_eval\ddr2\impl
DDR2_sdram\ddr_p_eval\ddr2\sim
DDR2_sdram\ddr_p_eval\ddr2\src
DDR2_sdram\ddr_p_eval\models
DDR2_sdram\ddr_p_eval\testbench
DDR2_sdram\ddr_p_eval\ddr2
DDR2_sdram\ram_dp
DDR2_sdram\ddr_p_eval
DDR2_sdram\pll_266.667
DDR2_sdram

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