Packet : 61549812verilog.rar filelist
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_clockgen.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_cop.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_crc.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_defines.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_fifo.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_host.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_maccontrol.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_macstatus.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_memory.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_miim.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_outputcontrol.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_phy.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_phy_defines.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_random.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_receivecontrol.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_register.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_registers.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_rxaddrcheck.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_rxcounters.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_rxethmac.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_rxstatem.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_shiftreg.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_spram_256x32.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_top.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_transmitcontrol.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_txcounters.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_txethmac.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_txstatem.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_wishbone.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\tb_cop.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\tb_ethernet.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\tb_ethernet_with_cop.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\tb_eth_defines.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\tb_eth_top.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\timescale.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\wb_bus_mon.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\wb_master32.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\wb_master_behavioral.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\wb_model_defines.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\wb_slave_behavioral.v
此代码是用Verilog实现的以太网接口\Chapter10 Sample\使用说明.txt
此代码是用Verilog实现的以太网接口\使用说明请参看右侧注释====〉〉.txt
此代码是用Verilog实现的以太网接口\Chapter10 Sample
此代码是用Verilog实现的以太网接口

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