Program composition module and system diagram The design of this scheme is mainly composed of the following modules 1: top module 2: data input sorting module 3: system control module 4:RAM controller module 5:ROM controller module 6: butterfly type unit module

FFT_top_5
FFT_top_5\DOC
FFT_top_5\DOC\FFT.vsd
FFT_top_5\DOC\FFT文档.docx
FFT_top_5\DOC\ramAddr_generator.vsd
FFT_top_5\DOC\system_ctl.vsd
FFT_top_5\FFT_matlab
FFT_top_5\FFT_matlab\FFT_in
FFT_top_5\FFT_matlab\FFT_out
FFT_top_5\FFT_matlab\FFT_out\FFT_out_imag.txt
FFT_top_5\FFT_matlab\FFT_out\FFT_out_real.txt
FFT_top_5\FFT_matlab\compare.m
FFT_top_5\FFT_matlab\debug
FFT_top_5\FFT_matlab\debug\X_R
FFT_top_5\FFT_matlab\debug\butterfly
FFT_top_5\FFT_matlab\debug\butterfly\X_R
FFT_top_5\FFT_matlab\debug\butterfly\butterfly_in
FFT_top_5\FFT_matlab\debug\butterfly\butterfly_out
FFT_top_5\FFT_matlab\debug\butterfly\div
FFT_top_5\FFT_matlab\debug\cobackwd
FFT_top_5\FFT_matlab\debug\data_out
FFT_top_5\FFT_matlab\debug\product
FFT_top_5\FFT_matlab\debug\ramAddr_generator
FFT_top_5\FFT_matlab\debug\romAddr_generator
FFT_top_5\FFT_matlab\debug\system_ctl
FFT_top_5\FFT_matlab\dif_matlab_rtl
FFT_top_5\FFT_matlab\dif_matlab_rtl\y-z_imag.txt
FFT_top_5\FFT_matlab\dif_matlab_rtl\y-z_real.txt
FFT_top_5\FFT_matlab\matlab_FFT
FFT_top_5\FFT_matlab\matlab_FFT\out_imag_data_Z.txt
FFT_top_5\FFT_matlab\matlab_FFT\out_real_data_Z.txt
FFT_top_5\FFT_matlab\radix4_butterfly_unit.m
FFT_top_5\FFT_matlab\radix4_fft - 副本.m
FFT_top_5\FFT_matlab\radix4_fft.m
FFT_top_5\PAR
FFT_top_5\RTL
FFT_top_5\RTL\FFT_top.vhd
FFT_top_5\RTL\code_backward.vhd
FFT_top_5\RTL\radix4_butterfly_unit.vhd
FFT_top_5\RTL\ram.vhd
FFT_top_5\RTL\ramAddr_generator.vhd
FFT_top_5\RTL\rom.vhd
FFT_top_5\RTL\romAddr_generator.vhd
FFT_top_5\RTL\system_ctl.vhd
FFT_top_5\Rotation_factor
FFT_top_5\Rotation_factor\ROMGen.m
FFT_top_5\Rotation_factor\Rotation_factor.m
FFT_top_5\Rotation_factor\auto_tb_bit_cmp.bat
FFT_top_5\Rotation_factor\rom.vhd
FFT_top_5\Rotation_factor\tb_bit_cmp.do
FFT_top_5\Rotation_factor\tb_bit_cmp.vhd
FFT_top_5\SIM
FFT_top_5\SIM\FFT_in
FFT_top_5\SIM\FFT_out
FFT_top_5\SIM\butterfly
FFT_top_5\SIM\butterfly\butterfly_in
FFT_top_5\SIM\butterfly\butterfly_out
FFT_top_5\SIM\cobackwd
FFT_top_5\SIM\ramAddr_generator
FFT_top_5\SIM\romAddr_generator
FFT_top_5\SIM\system_ctl
FFT_top_5\SIM\tb_FFT_top.vhd

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