The code is realized and simulated by verilog. The simulation result has been confirmed by the author. It is recommended to download by the researchers who are in the codec area.

src
src\SM4_deenc.v
src\SM4_enc.v
src\SM4_test.v
src\key_exp_sm4.v
src\mix_col.v
src\round_exe_sm4.v
src\round_exe_sm4_de.v
src\shift_row.v
src\sm4_decrypter_channel.v
src\sm4_encrypter_channel.v
src\sm4_key_expander.v
src\sm4_sbox.v
src\sm4_sbox_32.v
src\test.v

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