DES encryption algorithm design and Modelsim simulation based on Quartus II platform

DES_Core\dev\db\DES.cbx.xml
DES_Core\dev\db\DES.cmp.rdb
DES_Core\dev\db\DES.cmp_merge.kpt
DES_Core\dev\db\DES.db_info
DES_Core\dev\db\DES.hier_info
DES_Core\dev\db\DES.hif
DES_Core\dev\db\DES.ipinfo
DES_Core\dev\db\DES.lpc.html
DES_Core\dev\db\DES.lpc.rdb
DES_Core\dev\db\DES.lpc.txt
DES_Core\dev\db\DES.map.ammdb
DES_Core\dev\db\DES.map.bpm
DES_Core\dev\db\DES.map.cdb
DES_Core\dev\db\DES.map.hdb
DES_Core\dev\db\DES.map.kpt
DES_Core\dev\db\DES.map.logdb
DES_Core\dev\db\DES.map.qmsg
DES_Core\dev\db\DES.map.rdb
DES_Core\dev\db\DES.map_bb.cdb
DES_Core\dev\db\DES.map_bb.hdb
DES_Core\dev\db\DES.map_bb.logdb
DES_Core\dev\db\DES.pre_map.hdb
DES_Core\dev\db\DES.pti_db_list.ddb
DES_Core\dev\db\DES.rom0_s1_ede.hdl.mif
DES_Core\dev\db\DES.rom0_s2_edd.hdl.mif
DES_Core\dev\db\DES.rom0_s3_edc.hdl.mif
DES_Core\dev\db\DES.rom0_s4_ec3.hdl.mif
DES_Core\dev\db\DES.rom0_s5_ec2.hdl.mif
DES_Core\dev\db\DES.rom0_s6_ec1.hdl.mif
DES_Core\dev\db\DES.rom0_s7_ec0.hdl.mif
DES_Core\dev\db\DES.rom0_s8_ec7.hdl.mif
DES_Core\dev\db\DES.root_partition.map.reg_db.cdb
DES_Core\dev\db\DES.rtlv.hdb
DES_Core\dev\db\DES.rtlv_sg.cdb
DES_Core\dev\db\DES.rtlv_sg_swap.cdb
DES_Core\dev\db\DES.sld_design_entry.sci
DES_Core\dev\db\DES.sld_design_entry_dsc.sci
DES_Core\dev\db\DES.smart_action.txt
DES_Core\dev\db\DES.tis_db_list.ddb
DES_Core\dev\db\logic_util_heursitic.dat
DES_Core\dev\db\prev_cmp_DES.qmsg
DES_Core\dev\DES.bsf
DES_Core\dev\DES.qpf
DES_Core\dev\DES.qsf
DES_Core\dev\DES.qws
DES_Core\dev\incremental_db\compiled_partitions\DES.db_info
DES_Core\dev\incremental_db\compiled_partitions\DES.root_partition.map.cdb
DES_Core\dev\incremental_db\compiled_partitions\DES.root_partition.map.dpi
DES_Core\dev\incremental_db\compiled_partitions\DES.root_partition.map.hbdb.cdb
DES_Core\dev\incremental_db\compiled_partitions\DES.root_partition.map.hbdb.hb_info
DES_Core\dev\incremental_db\compiled_partitions\DES.root_partition.map.hbdb.hdb
DES_Core\dev\incremental_db\compiled_partitions\DES.root_partition.map.hbdb.sig
DES_Core\dev\incremental_db\compiled_partitions\DES.root_partition.map.hdb
DES_Core\dev\incremental_db\compiled_partitions\DES.root_partition.map.kpt
DES_Core\dev\incremental_db\README
DES_Core\dev\output_files\DES.done
DES_Core\dev\output_files\DES.flow.rpt
DES_Core\dev\output_files\DES.map.rpt
DES_Core\dev\output_files\DES.map.summary
DES_Core\doc\DES算法原理.docx
DES_Core\sim\a.txt
DES_Core\sim\b.txt
DES_Core\sim\DES_TB.cr.mti
DES_Core\sim\DES_TB.mpf
DES_Core\sim\transcript
DES_Core\sim\vsim.wlf
DES_Core\sim\wave.do
DES_Core\sim\work\@d@e@s\verilog.prw
DES_Core\sim\work\@d@e@s\verilog.psm
DES_Core\sim\work\@d@e@s\_primary.dat
DES_Core\sim\work\@d@e@s\_primary.dbs
DES_Core\sim\work\@d@e@s\_primary.vhd
DES_Core\sim\work\@d@e@s_@t@b\verilog.prw
DES_Core\sim\work\@d@e@s_@t@b\verilog.psm
DES_Core\sim\work\@d@e@s_@t@b\_primary.dat
DES_Core\sim\work\@d@e@s_@t@b\_primary.dbs
DES_Core\sim\work\@d@e@s_@t@b\_primary.vhd
DES_Core\sim\work\@i@p\verilog.prw
DES_Core\sim\work\@i@p\verilog.psm
DES_Core\sim\work\@i@p\_primary.dat
DES_Core\sim\work\@i@p\_primary.dbs
DES_Core\sim\work\@i@p\_primary.vhd
DES_Core\sim\work\@i@p_inv\verilog.prw
DES_Core\sim\work\@i@p_inv\verilog.psm
DES_Core\sim\work\@i@p_inv\_primary.dat
DES_Core\sim\work\@i@p_inv\_primary.dbs
DES_Core\sim\work\@i@p_inv\_primary.vhd
DES_Core\sim\work\contrl\verilog.prw
DES_Core\sim\work\contrl\verilog.psm
DES_Core\sim\work\contrl\_primary.dat
DES_Core\sim\work\contrl\_primary.dbs
DES_Core\sim\work\contrl\_primary.vhd
DES_Core\sim\work\des_f\verilog.prw
DES_Core\sim\work\des_f\verilog.psm
DES_Core\sim\work\des_f\_primary.dat
DES_Core\sim\work\des_f\_primary.dbs
DES_Core\sim\work\des_f\_primary.vhd
DES_Core\sim\work\key_get\verilog.prw
DES_Core\sim\work\key_get\verilog.psm
DES_Core\sim\work\key_get\_primary.dat

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