Image compression is one of the prominent topics in image processing that plays a very important role in reducing image size for real-time transmission and storage. Many of the standards recommend the use of DWT for image compression. The computational complexity of DWT imposes a major challenge for the real-time use of DWT-based image compression algorithms. In this paper, we propose a modified lifting scheme for computing the approximation and detailed coefficients of DWT. The modified equations use, right shift operators and 6-bit multipliers. The hierarchy levels in computation are reduced to one thereby minimizing the delay and increasing throughput. The design implemented on Virtex-5 FPGA operates at 180 MHz and consumes less than 1W of power. The design occupies less than 1 of the LUT resources on FPGA. The architecture developed is suitable for real-time image processing on FPGA platform.

Filename	Size	Update
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DWT的Verilog code\2Ddwt_ALL\02.raw	4096	2003-10-16
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DWT的Verilog code\2Ddwt_ALL\BABOO64.raw	4096	2003-10-16
DWT的Verilog code\2Ddwt_ALL\Debug\Psnr.exe	208956	2008-03-28
DWT的Verilog code\2Ddwt_ALL\Debug\Psnr.ilk	219020	2008-03-28
DWT的Verilog code\2Ddwt_ALL\Debug\Psnr.obj	6887	2008-03-28
DWT的Verilog code\2Ddwt_ALL\Debug\Psnr.pch	230024	2008-03-28
DWT的Verilog code\2Ddwt_ALL\Debug\Psnr.pdb	484352	2008-03-28
DWT的Verilog code\2Ddwt_ALL\Debug\save_FPGAtoPC.exe	172095	2003-10-16
DWT的Verilog code\2Ddwt_ALL\Debug\save_FPGAtoPC.ilk	186616	2003-10-16
DWT的Verilog code\2Ddwt_ALL\Debug\save_FPGAtoPC.obj	8591	2003-10-16
DWT的Verilog code\2Ddwt_ALL\Debug\save_FPGAtoPC.pch	2615772	2003-10-16
DWT的Verilog code\2Ddwt_ALL\Debug\save_FPGAtoPC.pdb	459776	2003-10-16
DWT的Verilog code\2Ddwt_ALL\Debug\SendPctoFPGA.exe	159806	2003-10-16
DWT的Verilog code\2Ddwt_ALL\Debug\SendPctoFPGA.ilk	180936	2003-10-16
DWT的Verilog code\2Ddwt_ALL\Debug\SendPctoFPGA.obj	4496	2003-10-16
DWT的Verilog code\2Ddwt_ALL\Debug\SendPctoFPGA.pch	312080	2003-10-16
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DWT的Verilog code\2Ddwt_ALL\Debug\vc60.idb	132096	2008-03-28
DWT的Verilog code\2Ddwt_ALL\Debug\vc60.pdb	69632	2008-03-28
DWT的Verilog code\2Ddwt_ALL\EARTH128.raw	16384	2003-10-16
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DWT的Verilog code\2Ddwt_ALL\LENA64.raw	4097	2003-10-16
DWT的Verilog code\2Ddwt_ALL\LENA64.raw.bak	4096	2003-10-16
DWT的Verilog code\2Ddwt_ALL\Psnr.cpp	1475	2003-10-16
DWT的Verilog code\2Ddwt_ALL\Psnr.dsp	3377	2008-03-28
DWT的Verilog code\2Ddwt_ALL\Psnr.dsw	533	2008-03-28
DWT的Verilog code\2Ddwt_ALL\Psnr.ncb	33792	2008-03-28
DWT的Verilog code\2Ddwt_ALL\Psnr.opt	49664	2008-03-28
DWT的Verilog code\2Ddwt_ALL\Psnr.plg	840	2008-03-28
DWT的Verilog code\2Ddwt_ALL\RAW\2D1L\2D_F1L_Col.raw	4096	2003-10-16
DWT的Verilog code\2Ddwt_ALL\RAW\2D1L\2D_F1L_Row.raw	4096	2003-10-16
DWT的Verilog code\2Ddwt_ALL\RAW\2D1L\2D_I1L_ReSource.raw	4096	2003-10-16
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DWT的Verilog code\2Ddwt_ALL\RAW\2D2L\2D_F2L_Row.raw	4096	2003-10-16
DWT的Verilog code\2Ddwt_ALL\RAW\2D2L\2D_F2L_Row_to_Resource.raw	4096	2003-10-16
DWT的Verilog code\2Ddwt_ALL\RAW\2D2L\2D_FI2L_ReSource.raw	4096	2003-10-16
DWT的Verilog code\2Ddwt_ALL\save_FPGAtoPC.cpp	1868	2003-10-16
DWT的Verilog code\2Ddwt_ALL\save_FPGAtoPC.dsp	3485	2003-10-16
DWT的Verilog code\2Ddwt_ALL\save_FPGAtoPC.opt	48640	2003-10-16
DWT的Verilog code\2Ddwt_ALL\save_FPGAtoPC.plg	1316	2003-10-16
DWT的Verilog code\2Ddwt_ALL\SendPctoFPGA.cpp	1951	2003-10-16
DWT的Verilog code\2Ddwt_ALL\SendPctoFPGA.dsp	3473	2003-10-16
DWT的Verilog code\2Ddwt_ALL\SendPctoFPGA.opt	48640	2003-10-16
DWT的Verilog code\2Ddwt_ALL\SendPctoFPGA.plg	740	2003-10-16
DWT的Verilog code\2Ddwt_ALL\text_02.raw	4096	2003-10-16
DWT的Verilog code\2Ddwt_ALL\text_02.raw.bak	16384	2003-10-16
DWT的Verilog code\2Ddwt_ALL\RAW\2D1L	0	2008-03-05
DWT的Verilog code\2Ddwt_ALL\RAW\2D2L	0	2008-03-05
DWT的Verilog code\2Ddwt_ALL\Debug	0	2008-03-28
DWT的Verilog code\2Ddwt_ALL\RAW	0	2008-03-05
DWT的Verilog code\2Ddwt_ALL	0	2008-03-28
DWT的Verilog code	0	2008-05-05

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