Introduction - If you have any usage issues, please Google them yourself
In addition to the frequency code, as long as the modified digital clock connect, you can get to the frequency of
Packet : 117143171div_clk.rar filelist
DIV_CLK\clock_div.done
DIV_CLK\clock_div.flow.rpt
DIV_CLK\clock_div.map.rpt
DIV_CLK\clock_div.map.summary
DIV_CLK\clock_div.qpf
DIV_CLK\clock_div.qsf
DIV_CLK\clock_div.qws
DIV_CLK\clock_div.sim.rpt
DIV_CLK\clock_div.v
DIV_CLK\clock_div.v.bak
DIV_CLK\clock_div.vwf
DIV_CLK\db\clock_div.(0).cnf.cdb
DIV_CLK\db\clock_div.(0).cnf.hdb
DIV_CLK\db\clock_div.cbx.xml
DIV_CLK\db\clock_div.cmp.rdb
DIV_CLK\db\clock_div.dbp
DIV_CLK\db\clock_div.db_info
DIV_CLK\db\clock_div.eco.cdb
DIV_CLK\db\clock_div.eds_overflow
DIV_CLK\db\clock_div.fnsim.cdb
DIV_CLK\db\clock_div.fnsim.hdb
DIV_CLK\db\clock_div.fnsim.qmsg
DIV_CLK\db\clock_div.hier_info
DIV_CLK\db\clock_div.hif
DIV_CLK\db\clock_div.map.bpm
DIV_CLK\db\clock_div.map.cdb
DIV_CLK\db\clock_div.map.ecobp
DIV_CLK\db\clock_div.map.hdb
DIV_CLK\db\clock_div.map.logdb
DIV_CLK\db\clock_div.map.qmsg
DIV_CLK\db\clock_div.map_bb.cdb
DIV_CLK\db\clock_div.map_bb.hdb
DIV_CLK\db\clock_div.map_bb.logdb
DIV_CLK\db\clock_div.pre_map.cdb
DIV_CLK\db\clock_div.pre_map.hdb
DIV_CLK\db\clock_div.psp
DIV_CLK\db\clock_div.pss
DIV_CLK\db\clock_div.rtlv.hdb
DIV_CLK\db\clock_div.rtlv_sg.cdb
DIV_CLK\db\clock_div.rtlv_sg_swap.cdb
DIV_CLK\db\clock_div.sgdiff.cdb
DIV_CLK\db\clock_div.sgdiff.hdb
DIV_CLK\db\clock_div.sim.cvwf
DIV_CLK\db\clock_div.sim.hdb
DIV_CLK\db\clock_div.sim.qmsg
DIV_CLK\db\clock_div.sim.rdb
DIV_CLK\db\clock_div.sim_ori.vwf
DIV_CLK\db\clock_div.sld_design_entry.sci
DIV_CLK\db\clock_div.sld_design_entry_dsc.sci
DIV_CLK\db\clock_div.syn_hier_info
DIV_CLK\db\prev_cmp_clock_div.sim.qmsg
DIV_CLK\db\wed.wsf
DIV_CLK\prev_cmp_clock_div.qmsg
DIV_CLK\db
DIV_CLK
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