Introduction - If you have any usage issues, please Google them yourself
Can use the generic SDRAM controller can be used in the FPGA, the SDR is the type of
Packet : 81404621sdr_sdram_controler_verilog.rar filelist
SDRAM控制器\sdr_ctrl.v
SDRAM控制器\sdr_data.v
SDRAM控制器\sdr_par.v
SDRAM控制器\sdr_sig.v
SDRAM控制器\sdr_top.v
SDRAM控制器