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- Update : 2008-10-13
- Size : 17.63kb
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- Author ：陈****
- About ： 陈轩辕
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Introduction - If you have any usage issues, please Google them yourself
The simple use of verilog HDL in this file enables the microcpu design and development process
Packet file list
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Packet : 55593413veririsccpu.rar filelist VeriRiscCPU\alu.v VeriRiscCPU\clockgen.v VeriRiscCPU\control.v VeriRiscCPU\counter.v VeriRiscCPU\cpu.v VeriRiscCPU\CPUtest1.dat VeriRiscCPU\CPUtest2.dat VeriRiscCPU\CPUtest3.dat VeriRiscCPU\cpu_test.v VeriRiscCPU\defines.v VeriRiscCPU\memory.v VeriRiscCPU\register.v VeriRiscCPU\scalable_mux.v VeriRiscCPU\sim.do VeriRiscCPU\transcript VeriRiscCPU\vlog.args VeriRiscCPU\vsim.wlf VeriRiscCPU
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