verilog HDL language digital stopwatch, simulation has already been adopted, for reference

Packet : 15883875wtut_ver.zip filelist
wtut_ver/
wtut_ver/clk_div_262k.v
wtut_ver/debounce.v
wtut_ver/hex2led.v
wtut_ver/led_control.v
wtut_ver/STMACH_V.v
wtut_ver/stopwatch.v
wtut_ver/stopwatch_tb.v
wtut_ver/ten_cnt.v
wtut_ver/time_cnt.v
wtut_ver/wtut_ver.ise
wtut_ver/wtut_ver_completed/
wtut_ver/wtut_ver_completed/clk_div_262k.v
wtut_ver/wtut_ver_completed/dcm1.xaw
wtut_ver/wtut_ver_completed/debounce.v
wtut_ver/wtut_ver_completed/hex2led.v
wtut_ver/wtut_ver_completed/led_control.v
wtut_ver/wtut_ver_completed/STMACH_V.v
wtut_ver/wtut_ver_completed/stopwatch.ucf
wtut_ver/wtut_ver_completed/stopwatch.v
wtut_ver/wtut_ver_completed/stopwatch.xcf
wtut_ver/wtut_ver_completed/stopwatch_tb.v
wtut_ver/wtut_ver_completed/ten_cnt.edn
wtut_ver/wtut_ver_completed/ten_cnt.v
wtut_ver/wtut_ver_completed/ten_cnt.xco
wtut_ver/wtut_ver_completed/time_cnt.v
wtut_ver/wtut_ver_completed/wtut_ver.ise

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