Using FPGA to achieve CRC algorithm, only one pulse will be able to realize, than the traditional algorithm greatly saving time shift

Packet : 107215810crc_7gpga.rar filelist
CRC
CRC\automake.log
CRC\CRC.dhp
CRC\CRC.ise
CRC\CRC.ise_ISE_Backup
CRC\crc12_4.v
CRC\CRC16-7.v
CRC\CRC16_7.isim_stx_prj
CRC\CRC16_7.isim_stx_sim
CRC\CRC16_7_stx.prj
CRC\CRC16_7_summary.html
CRC\CRC16_7_test.v
CRC\CRC16_7_test_v.isim_beh_exe
CRC\CRC16_7_test_v.isim_beh_log
CRC\CRC16_7_test_v.isim_beh_prj
CRC\CRC16_7_test_v.isim_stx
CRC\CRC16_7_test_v.isim_stx_prj
CRC\CRC16_7_test_v_beh.prj
CRC\CRC16_7_test_v_isim_beh.exe
CRC\CRC16_7_test_v_stx.prj
CRC\crc16_8.v
CRC\crc32.isim_stx_prj
CRC\crc32.isim_stx_sim
CRC\crc32_8.v
CRC\crc32_stx.prj
CRC\crc32_summary.html
CRC\CRC64_7.isim_stx_prj
CRC\CRC64_7.isim_stx_sim
CRC\CRC64_7.v
CRC\CRC64_7_stx.prj
CRC\CRC64_7_Test.v
CRC\CRC64_7_Test_v.isim_beh_exe
CRC\CRC64_7_Test_v.isim_beh_log
CRC\CRC64_7_Test_v.isim_beh_prj
CRC\CRC64_7_Test_v.isim_stx
CRC\CRC64_7_Test_v.isim_stx_prj
CRC\CRC64_7_Test_v_beh.prj
CRC\CRC64_7_Test_v_isim_beh.exe
CRC\CRC64_7_Test_v_stx.prj
CRC\crc8_8.v
CRC\crc_ccit_8.v
CRC\isim.cmd
CRC\isim.hdlsourcefiles
CRC\isimwavedata.xwv
CRC\userlang.tpl
CRC\xilinxsim.ini
CRC\__projnav.log
CRC\__projnav
CRC\__projnav\CRC.gfl
CRC\__projnav\sumrpt_tcl.rsp
CRC\_xmsgs
CRC\work
CRC\work\hdllib.ref
CRC\work\hdpdeps.ref
CRC\work\vlg6C
CRC\work\vlg6C\_c_r_c64__7.bin
CRC\work\vlg39
CRC\work\vlg39\crc32.bin
CRC\work\vlg2D
CRC\work\vlg2D\glbl.bin
CRC\work\vlg2D\_c_r_c16__7.bin
CRC\work\vlg25
CRC\work\vlg25\_c_r_c16__7__test__v.bin
CRC\work\vlg18
CRC\work\vlg18\_c_r_c64__7___test__v.bin
CRC\isim.tmp_save
CRC\isim.tmp_save\_1
CRC\isim
CRC\isim\work
CRC\isim\work\hdllib.ref
CRC\isim\work\hdpdeps.ref
CRC\isim\work\_c_r_c64__7___test__v
CRC\isim\work\_c_r_c64__7___test__v\xsim_c_r_c64__7___test__v.cpp
CRC\isim\work\_c_r_c64__7___test__v\_c_r_c64__7___test__v.h
CRC\isim\work\_c_r_c64__7___test__v\mingw
CRC\isim\work\_c_r_c64__7___test__v\mingw\_c_r_c64__7___test__v.obj
CRC\isim\work\_c_r_c64__7
CRC\isim\work\_c_r_c64__7\_c_r_c64__7.h
CRC\isim\work\_c_r_c64__7\mingw
CRC\isim\work\_c_r_c64__7\mingw\_c_r_c64__7.obj
CRC\isim\work\_c_r_c16__7__test__v
CRC\isim\work\_c_r_c16__7__test__v\xsim_c_r_c16__7__test__v.cpp
CRC\isim\work\_c_r_c16__7__test__v\_c_r_c16__7__test__v.h
CRC\isim\work\_c_r_c16__7__test__v\mingw
CRC\isim\work\_c_r_c16__7__test__v\mingw\_c_r_c16__7__test__v.obj
CRC\isim\work\_c_r_c16__7
CRC\isim\work\_c_r_c16__7\_c_r_c16__7.h
CRC\isim\work\_c_r_c16__7\mingw
CRC\isim\work\_c_r_c16__7\mingw\_c_r_c16__7.obj
CRC\isim\work\vlg6C
CRC\isim\work\vlg6C\_c_r_c64__7.bin
CRC\isim\work\vlg2D
CRC\isim\work\vlg2D\glbl.bin
CRC\isim\work\vlg2D\_c_r_c16__7.bin
CRC\isim\work\vlg25
CRC\isim\work\vlg25\_c_r_c16__7__test__v.bin
CRC\isim\work\vlg18
CRC\isim\work\vlg18\_c_r_c64__7___test__v.bin
CRC\isim\work\glbl
CRC\isim\work\glbl\glbl.h
CRC\isim\work\glbl\mingw
CRC\isim\work\glbl\mingw\glbl.obj

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