Introduction - If you have any usage issues, please Google them yourself
Using Verilog realize an electronic clock, a template for beginners to learn Verilog.
Packet : 29782221clock.rar filelist
Clock\clk.v
Clock\Clock.qpf
Clock\Clock.qsf
Clock\clock.v
Clock\db\Clock.db_info
Clock\delay.v
Clock\display.v
Clock\fdiv.v
Clock\fdiv_ms.v
Clock\key_press.v
Clock\时钟文档.doc
Clock\db
Clock