Hot Search : Source embeded web remote control p2p game More...
Location : Home Downloads Other resource
  • Category : Other resource
  • Tags :
  • Update : 2008-10-13
  • Size : 11.5kb
  • Downloaded :0次
  • Author :Ja***
  • About : Jason
  • PS : If download it fails, try it again. Download again for free!
Download 1 (11.5kb)
Don't use download software fo downloading.
If download fail,Try it again for free.
Introduction - If you have any usage issues, please Google them yourself
Using Verilog realize an electronic clock, a template for beginners to learn Verilog.
Packet file list
(Preview for download)
Packet : 29782221clock.rar filelist
Clock\clk.v
Clock\Clock.qpf
Clock\Clock.qsf
Clock\clock.v
Clock\db\Clock.db_info
Clock\delay.v
Clock\display.v
Clock\fdiv.v
Clock\fdiv_ms.v
Clock\key_press.v
Clock\时钟文档.doc
Clock\db
Clock
Related instructions
  • We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please Google on your own.
  • The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please contact us.
  • Please use Winrar for decompression tools
  • If download fail, Try it againg or Feedback to us.
  • If downloaded content did not match the introduction, Feedback to us,Confirm and will be refund.
  • Before downloading, you can inquire through the uploaded person information

Nothing.

Post Comment
*Quick comment Recommend Not bad Password Unclear description Not source
Lost files Unable to decompress Bad
*Content :
*Captcha :
CodeBus is one of the largest source code repositories on the Internet!
Contact us :
1999-2046 CodeBus All Rights Reserved.