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  • Update : 2008-10-13
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Introduction - If you have any usage issues, please Google them yourself
Using Verilog HDL to the AD7705 control ADC sampling, laboratory师兄the
Packet file list
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Packet : 83390046adctest.rar filelist
ADCtest\cmp_state.ini
ADCtest\db\test.(0).cnf.cdb
ADCtest\db\test.(0).cnf.hdb
ADCtest\db\test.(1).cnf.cdb
ADCtest\db\test.(1).cnf.hdb
ADCtest\db\test.(2).cnf.cdb
ADCtest\db\test.(2).cnf.hdb
ADCtest\db\test.asm.qmsg
ADCtest\db\test.cbx.xml
ADCtest\db\test.cmp.cdb
ADCtest\db\test.cmp.hdb
ADCtest\db\test.cmp.rdb
ADCtest\db\test.cmp.tdb
ADCtest\db\test.cmp0.ddb
ADCtest\db\test.db_info
ADCtest\db\test.eco.cdb
ADCtest\db\test.fit.qmsg
ADCtest\db\test.hier_info
ADCtest\db\test.hif
ADCtest\db\test.map.cdb
ADCtest\db\test.map.hdb
ADCtest\db\test.map.qmsg
ADCtest\db\test.pre_map.cdb
ADCtest\db\test.pre_map.hdb
ADCtest\db\test.psp
ADCtest\db\test.rtlv.hdb
ADCtest\db\test.rtlv_sg.cdb
ADCtest\db\test.rtlv_sg_swap.cdb
ADCtest\db\test.sgdiff.cdb
ADCtest\db\test.sgdiff.hdb
ADCtest\db\test.signalprobe.cdb
ADCtest\db\test.sld_design_entry.sci
ADCtest\db\test.sld_design_entry_dsc.sci
ADCtest\db\test.syn_hier_info
ADCtest\db\test.tan.qmsg
ADCtest\db\test_cmp.qrpt
ADCtest\M10MHz.bsf
ADCtest\M10MHz.vhd
ADCtest\SetData.bsf
ADCtest\SetData.vhd
ADCtest\test.asm.rpt
ADCtest\test.bdf
ADCtest\test.cdf
ADCtest\test.done
ADCtest\test.fit.eqn
ADCtest\test.fit.rpt
ADCtest\test.fit.summary
ADCtest\test.flow.rpt
ADCtest\test.map.eqn
ADCtest\test.map.rpt
ADCtest\test.map.summary
ADCtest\test.pin
ADCtest\test.pof
ADCtest\test.ppl
ADCtest\test.qpf
ADCtest\test.qsf
ADCtest\test.qws
ADCtest\test.sof
ADCtest\test.tan.rpt
ADCtest\test.tan.summary
ADCtest\db
ADCtest
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