Introduction - If you have any usage issues, please Google them yourself
Simple MIPS CPU code for this CPU contains shift add sub and or stl beq lw sw functions
Packet : 91332002mipstest00.rar filelist
TESTmux4.v
TOPsim.v
ALU.v
ALUCTL.v
ALUsim.v
controlSIM.v
controlUNIT.v
instruction.v
instructionTEST.v
MDR.v
memANDrom.v
MIPSdatapath.v
mux2to1.v
mux4to1.v
muxW15.v
PC.v
reg32.v
registers.v
SIMmemANDrom.v